AMIS49587C5871G ON Semiconductor, AMIS49587C5871G Datasheet - Page 17

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AMIS49587C5871G

Manufacturer Part Number
AMIS49587C5871G
Description
IC MODEM PLC 50/60MHZ 28PLCC
Manufacturer
ON Semiconductor
Datasheet

Specifications of AMIS49587C5871G

Baud Rates
Selectable
Interface
SCI
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
28-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-

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Quantity:
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5.2.1 Transmitter
the communication signal which will be sent on the
transmitting channel during the transmitting phase. This
block is connected to a power amplifier which injects the
output signal on the mains through a line- -coupler.
5.2.2 Receiver
pass filtered in order to avoid aliasing during the
conversion. Then the level of the signal is automatically
adapted by an automatic gain control (AGC) block. This
operation maximizes the dynamic range of the incoming
signal. The signal is then converted to its digital
representation using sigma delta modulation. From then on,
the processing of the data is done in a digital way. By using
dedicated hardware, a direct quadrature demodulation is
performed. The signal demodulated in the base band is then
low pass filtered to reduce the noise and reject the image
spectrum.
Clock and Control
data is transmitted at the zero crossing of the mains voltage.
In order to recover the information at the zero crossing, a
zero crossing detection of the mains is performed. A
phase- -locked loop (PLL) structure is used in order to allow
a more reliable reconstruction of the synchronization. This
PLL permits as well a safer implementation of the
TO Power Amplifier
FROM Line Coupler
The AMIS- -49587 Transmitter function block prepares
The analog signal coming from the line- -coupler is low
According to the IEC- -61334- -5- -1 standard, the frame
the frame is correct, it is passed to the external
processor.
The Test Mode is used to test the compliance of a
PLC modem conforms to CENELEC. EN 50065- -1
by a Continuous broadcast of f
Test Mode:
M50Hz_IN
REF_OUT
RX _OUT
TX_ENB
TX_OUT
ALC_IN
RX _IN
AMIS- -49587
Transmitter (S- -FSK Modulator)
Receiver (S- - FSK Demodulator)
Clock and Control
crossing
Zero
AAF
VDDA
Figure 9. S- -FSK Modem AMIS- -49587 Block Diagram
S
VSSA
Filter
AGC
or f
PLL
LP
M
VDDD
.
REF
D/A
A/D
Clock Generator
VSSD
& Timer
http://onsemi.com
& Sine Synthesizer
Transmit Data
Demodulator
S- -FSK
17
XIN
OSC
5.2
units of the AMIS- -49587:
”repetition with credit” function (also known as chorus
transmission). The clock generator makes use of a precise
quartz oscillator master. The clock signals are then obtained
by the use of a programmed division scheme. The support
circuits are also contained in this block. The support circuits
include the necessary blocks to supply the references
voltages for the AD and DA converters, the biasing currents
and power supply sense cells to generate the right power off
and startup conditions.
5.2.3 Communication Controller
micro- -processor, its peripherals: RAM, ROM, UART,
TIMER, and the Power on reset. The processor uses the
ARM Reduced Instruction Set Computer (RISC)
XOUT
The block diagram below represents the main functional
The Communication Controller block includes the
FUNCTIONAL DESCRIPTION
Figure 10. Data Stream is in Sync with Zero
Crossings of the Mains (Example for 50 Hz)
Communication Controller
Data
RAM
ARM
Risc
Core
20 ms
Program
ROM
Timer 1 & 2
Local Port
Watchdog
Interface
Interrupt
Comm.
Control
Control
Serial
POR
Test
PC20091019.2
24 bit @ 1200 baud
5
TxD
T_REQ
TEST
JTAG I /F
RESB
RxD
BR 0
BR 1
RX _DATA
CRC
TX_DATA / PRE _SLOT
Micro Controller
TO Application

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