QT1106-ISG Atmel, QT1106-ISG Datasheet - Page 12

• Manufacturer Part Number: QT1106-ISG
• Description: QT1106 WHEEL/SLIDER CHIP W/7KEYS
• Manufacturer: Atmel
• Series: QSlide™, QTouch™, QWheel™r
• Type: Capacitiver

Specifications of QT1106-ISG

• Touch Panel Interface: 5-Wire
• Number Of Inputs/keys: 7 Slider
• Resolution (bits): 14 b
• Data Interface: Serial, SPI™
• Voltage Reference: External
• Voltage - Supply: 2.8 V ~ 5 V
• Current - Supply: 1.3mA ~ 3.6mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-QFN
• Output Type: Logic
• Interface: SPI
• Input Type: Logic
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 427-1115-2

/SS Wake Pulse in LP Mode: In LP mode the host should
wake the device from sleep using a low pulse on /SS. The
pulse should be at least 125µs wide.
Within 100µs of the end of the /SS pulse, the QT1106 will
take DRDY low for at least 40µs to indicate that it has
received the /SS wake pulse.
Following the >45µs DRDY low pulse, the host can
communicate normally with the device (see ‘Command
During LP Mode’ on Page 12).
If the LPB bit (page 9) is set, the device will then perform a
set of acquire bursts during which DRDY will be low.
Provided no key is detected as being touched during that
burst, the QT1106 will go back to sleep, leaving DRDY high.
The CHANGE pin can go high if a key state changes during
the burst(s) following the wake pulse.
If a key is confirmed as touched, the device will transition to
Free Run mode automatically.
Command During LP Mode: First read ‘/SS Wake Pulse in
LP Mode’, on Page 11. Following DRDY rising at the end of
the 45µs low pulse, the host may perform a normal SPI
transfer as shown in Figure 3.1. The SPI transfer may start
while DRDY is high (450µs), and for a 20µs grace period
thereafter.
After the SPI transfer is completed, the QT1106 will generate
a set of three acquire bursts if LPB = 1, during which DRDY
will be low.
The mode and options settings sent from the host to the
QT1106 during the SPI transfer take effect after the set of
acquire bursts.
Lq
(QT1106 Input - MOSI)
(QT1106 Out - MISO)
•
•
Host Data Output
SCLK from Host
QT Data Output
Acquire Bursts
DRDY from QT
If Free Run mode is selected, the QT1106 will take
DRDY high to indicate the possibility of an SPI
transfer.
If either LP mode or Sleep mode is selected, the
QT1106 will go back to sleep with DRDY high
provided no key is detected as possibly touched.
/SS from host
>40us
<150us
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3-state
No SPI Communication
>125us
<100us
Figure 4.2 LP Mode SPI Operation with LPB = 0
/SS timing as left
12
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The CHANGE pin will go high at this time if a key is
confirmed as touched.
4.4 Sleep Mode
Sleep mode offers the lowest possible current drain, in the
low microamp region.
Sleep mode is a special case of LP mode, where the sleep
duration between bursts is infinite. All comments concerning
LP mode, including about SPI communications, apply equally
to Sleep mode, except that the LPB bit is ignored and bursts
are always generated after an SPI transfer or /SS wake
pulse as if LPB = 1.
Note that in Sleep mode the QT1106 only performs
acquisition bursts following being woken by /SS. This has two
effects.
This mode can be used by the host to create its own ‘LP
Mode’ timings via the /SS wakeup pulse method.
•
•
•
If Sync mode is selected, the QT1106 will go back to
sleep with DRDY high provided no key is detected as
possibly touched.
Touch detection only occurs following /SS-wake
pulses, and hence CHANGE can only go high at that
time.
The QT1106 cannot drift its internal references unless
the host sends periodic /SS wake pulses. If the host
does not do this, then it should command the QT1106
to recalibrate when it sets the QT1106 into a different
operating mode.
SPI Communication
<470us
command bytes
response bytes
>70us
<200us
3-state
QT1106_8IR0.07_0907
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