MAX7360ETL+T Maxim Integrated Products, MAX7360ETL+T Datasheet - Page 16

• Manufacturer Part Number: MAX7360ETL+T
• Description: IC CTRLR KEY-SW I2C 40TQFN-EP
• Manufacturer: Maxim Integrated Products
• Type: Controllerr

Specifications of MAX7360ETL+T

• Input Type: Logic
• Output Type: Logic
• Interface: I²C
• Current - Supply: 50µA
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I
Driver/GPIOs with Integrated ESD Protection
transaction, either read or write, if SCL low exceeds
20ms. After a bus timeout, the MAX7360 waits for a valid
START condition before responding to a consecutive
transmission. This feature can be enabled or disabled
under user control by writing to the configuration register
(Table 8 in the Register Tables section).
A write to the MAX7360 comprises the transmission of the
slave address with the R/W bit set to zero, followed by at
least 1 byte of information. The first byte of information
is the command byte. The command byte determines
which register of the MAX7360 is to be written by the next
byte, if received. If a STOP condition is detected after the
command byte is received, the MAX7360 takes no further
action (Figure 7) beyond storing the command byte.
Any bytes received after the command byte are data bytes.
The first data byte goes into the internal register of the
MAX7360 selected by the command byte (Figure 8).
If multiple data bytes are transmitted before a STOP condi-
tion is detected, these bytes are generally stored in subse-
quent MAX7360 internal registers, because the command
byte address generally autoincrements (Table 4).
The MAX7360 is read using the internally stored com-
mand byte as an address pointer, the same way the
stored command byte is used as an address pointer
for a write. The pointer generally autoincrements after
each data byte is read using the same rules as for a
Table 4. Autoincrement Rules
16
Figure 9. N Data Bytes Received
Keys FIFO
Autoshutdown
All other key switch
All other GPIO
2
C-Interfaced Key-Switch Controller and LED
_____________________________________________________________________________________
FUNCTION
REGISTER
S
SLAVE ADDRESS
ACKNOWLEDGE FROM MAX7360
Message Format for Reading
Message Format for Writing
0x01 to 0x05
0x40 to 0x5F
CODE (hex)
ADDRESS
0x00
0x06
the Key-Scan Controller
the Key-Scan Controller
R/W
0
AUTOINCREMENT
ADDRESS (hex)
A
Addr + 0x01
Addr + 0x01
D7
0x00
0x00
D6
D5
COMMAND BYTE
ACKNOWLEDGE FROM MAX7360
D4
D3
write (Table 4). Thus, a read is initiated by first config-
uring the MAX7360’s command byte by performing a
write (Figure 7). The master can now read n consecutive
bytes from the MAX7360, with the first data byte being
read from the register addressed by the initialized com-
mand byte. When performing read-after-write verifica-
tion, remember to reset the command byte’s address,
because the stored command byte address is generally
autoincremented after the write (Figure 9, Table 4).
When the MAX7360 is operated on a 2-wire interface
with multiple masters, a master reading the MAX7360
uses a repeated start between the write that sets the
MAX7360’s address pointer, and the read(s) that takes
the data from the location(s). This is because it is pos-
sible for master 2 to take over the bus after master 1 has
set up the MAX7360’s address pointer, but before mas-
ter 1 has read the data. If master 2 subsequently resets
the MAX7360’s address pointer, master 1’s read can be
from an unexpected location.
Address autoincrementing allows the MAX7360 to be
configured with fewer transmissions by minimizing the
number of times the command address needs to be
sent. The command address stored in the MAX7360
generally increments after each data byte is written or
read (Table 4). Autoincrement only works when doing a
multiburst read or write.
After a catastrophic event such as ESD discharge or
microcontroller reset, use bit D7 of the configuration
register (0x01) as a software reset for the key-switch
state (the key-switch register values and FIFO remain
unaffected). Use bit D4 of the GPIO global configura-
tion register (0x40) as a software reset for the GPIOs.
D2
D1
D0
Command Address Autoincrementing
A
Operation with Multiple Masters
D7
Applications Information
D6
D5
ACKNOWLEDGE FROM MAX7360
D4
N BYTES
DATA BYTE
D3
D2
COMMAND BYTE ADDRESS
Reset from I
D1
AUTOINCREMENT
D0
A
P
2
C