MAX3784AUTE+ Maxim Integrated Products, MAX3784AUTE+ Datasheet - Page 5

• Manufacturer Part Number: MAX3784AUTE+
• Description: IC BOARD EQUALIZER 5GBPS 16-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX3784AUTE+

• Applications: Data Transport
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 16-TQFN Exposed Pad
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Interface: -

Figure 2. Functional Diagram
The MAX3784/MAX3784A adaptive equalizers extend
the reach of transmission lines in high-frequency back-
plane interconnect applications. They can be used for
4.25Gbps Fibre Channel, 4x 1.25Gbps Ethernet (5Gbps)
and other NRZ, 8b10b or short (≤ 20 bits) CID data
types. Internally, the MAX3784/MAX3784A are com-
prised of an equalizer control loop and limiting output
driver. The equalizer block reduces intersymbol interfer-
ence (ISI), compensating for frequency-dependent
media-induced loss. The equalization control detects the
spectral contents of the input signal and provides a con-
trol voltage to the equalizer core, adapting it to different
media. The equalizer operation is optimized for short-run,
DC-balanced transmission codes.
_______________________________________________________________________________________________________
5, 8, 14, 15,
1, 7, 12
4, 6, 9
PIN
EP
16
10
11
13
2
3
Exposed
NAME
OUT+
OUT-
GND
N.C.
V
IN+
Pad
IN-
EN
General Theory of Operation
CC
Detailed Description
+3.3V Supply Voltage
Positive Input, CML
Negative Input, CML
Supply Ground
No Connection. Leave unconnected.
Negative Output, CML
Positive Output, CML
Enable Equalizer. A logic high or open selects normal operation. A logic low selects low-power
standby mode.
Connect to Ground. The exposed pad must be soldered to the circuit board ground plane for proper
thermal and electrical performance.
IN+
IN-
EN
V
CC
100Ω
40kΩ
LOWPASS FILTER
CANCELLATION
EQUALIZER
OFFSET
5Gbps EQUALIZER
Standby saves power when the equalizer is not in use.
The EN logic input must be set high or open for normal
operation. Logic low at EN forces the equalizer into the
standby state.
The input and output buffers are implemented using cur-
rent-mode logic (CML). Equivalent circuits are shown in
Figures 3 and 4. For details on interfacing with CML,
refer to Maxim Application Note HFAN-01.0: Introduction
to LVDS, PECL, and CML . The common-mode voltage
of the input and output is above +2.5V. AC-coupling
capacitors are required when interfacing this part with
devices terminated in voltages such as +1.8V. Values of
0.10µF or greater are recommended.
LIMITER
MAX3784A
MAX3784/
5Gbps PCB Equalizer
FUNCTION
50Ω
V
CC
CML Input and Output Buffers
50Ω
OUT+
OUT-
Pin Description
Standby Mode
5