W83697HG Nuvoton Technology Corporation of America, W83697HG Datasheet

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W83697HG

Manufacturer Part Number
W83697HG
Description
IC LPC SUPER I/O 128-PQFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83697HG

Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V, 5V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
W83697HG
Manufacturer:
Winbond
Quantity:
1 000
Part Number:
W83697HG
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
W83697HF/HG Data Sheet
WINBOND LPC I/O
WINBOND LPC I/O
W83697HF
W83697HG
Date: May 30, 2005 Revision: A1
Publication Release Date: May 30, 2005
- i -
Revision A1

Related parts for W83697HG

W83697HG Summary of contents

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... WINBOND LPC I/O W83697HF W83697HG Date: May 30, 2005 Revision W83697HF/HG Data Sheet WINBOND LPC I/O Publication Release Date: May 30, 2005 Revision A1 ...

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Table of Content- 1. GENERAL DESCRIPTION ......................................................................................................... 1 2. FEATURES ................................................................................................................................. 2 3. BLOCK DIAGRAM FOR W83697HF .......................................................................................... 5 4. PIN CONFIGURATION FOR W83697HF................................................................................... 6 5. PIN DESCRIPTION.................................................................................................................... 7 5.1 LPC Interface .................................................................................................................. 8 5.2 FDC Interface ................................................................................................................. 9 5.3 ...

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Plug and Play Configuration ......................................................................................... 62 7.2 Compatible PnP............................................................................................................ 62 7.2.1 Extended Function Registers..........................................................................................62 7.2.2 Extended Functions Enable Registers (EFERs) .............................................................63 7.2.3 Extended Function Index Registers (EFIRs), Extended Function Data Registers(EFDRs) 63 7.3 Configuration Sequence ............................................................................................... 63 7.3.1 Enter ...

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GENERAL DESCRIPTION The W83697HF is evolving product from Winbond's most popular I/O family. They feature a whole new interface, namely LPC (Low Pin Count) interface, which will be supported in the new generation chip-set. This interface as its name ...

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FEATURES General • Meet LPC Spec. 1.01 • Support LDRQ#(LPC DMA), SERIRQ (serial IRQ) • Include all the features of Winbond I/O W83877TF • Integrate Hardware Monitor functions • Compliant with Microsoft PC98/PC99 Hardware Design Guide • Support DPM ...

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Infrared • Support IrDA version 1.0 SIR protocol with maximum baud rate up to 115.2K bps • Support SHARP ASK-IR protocol with maximum baud rate up to 57,600 bps • Support Consumer IR with Wake-Up function. • Parallel Port ...

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Hardware Monitor Functions • Smart fan control system, support thermal Cruise • 2 thermal inputs from optionally remote thermistors or 2N3904 transistors or Pentium thermal diode output • 6 positive voltage inputs (typical for +12V, -12V, +5V, -5V, +3.3V, Vcore) ...

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BLOCK DIAGRAM FOR W83697HF LRESET#, LCLK, LFRAME#, LAD[3:0], LDRQ#, SERIRQ Joystick interface signals MSI MSO General-purpose I/O pins Hardware monitor channel and Vref Flash ROM interface signals LPC Interface Game FDC Port MIDI URA, B GPIO IR HM CIR ...

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PIN CONFIGURATION FOR W83697HF VTIN2 VTIN2 VTIN2 VTIN2 103 103 103 103 103 VTIN1 VTIN1 VTIN1 VTIN1 104 104 104 104 104 AVCC AVCC AVCC AVCC 105 105 105 105 105 VREF VREF VREF VREF 106 106 106 106 ...

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PIN DESCRIPTION Note: Please refer to Section 10.2 DC CHARACTERISTICS for details I/O 8t TTL level bi-directional pin with 8mA source-sink capability I/O 12t TTL level bi-directional pin with 12mA source-sink capability I/O 24t TTL level bi-directional pin with ...

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PIN DESCRIPTION, Continued TTL level input pin with internal pull down resistor IN tu TTL level input pin with internal pull up resistor IN ts TTL level Schmitt-trigger input pin IN tsp3 3.3V TTL level Schmitt-trigger input pin ...

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FDC Interface SYMBOL PIN I/O OD DRVDEN0 INDEX# 2 csu OD MOA DSB DSA MOB DIR STEP WD# ...

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Multi-Mode Parallel Port The following pins have alternate functions, which are controlled by CR28 and L3-CRF0. SYMBOL PIN I SLCT WE2 WD2# FUNCTION PRINTER MODE: An active high ...

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Multi-Mode Parallel Port, continued SYMBOL PIN I BUSY MOB2 ACK DSB2# ERR HEAD2# FUNCTION PRINTER MODE: An active high input indicates that the printer ...

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Multi-Mode Parallel Port, continued SYMBOL PIN I/O SLIN STEP2# 12 INIT DIR2# 12 AFD DRVDEN0 FUNCTION PRINTER MODE: SLIN# Output line for detection of printer selection. ...

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Multi-Mode Parallel Port, continued SYMBOL PIN I/O STB PD0 42 I/O 12ts INDEX2 PD1 41 I/O 12ts IN TRAK02# ts PD2 40 I/O 12ts IN ts FUNCTION PRINTER MODE: STB# An active ...

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Multi-Mode Parallel Port, continued SYMBOL PIN I/O PD3 39 I/O 12ts IN RDATA2# ts PD4 38 I/O 12ts IN DSKCHG2# ts PD5 37 I/O 12ts - - PD6 36 I/O 12ts - OD MOA2# 12 PD7 35 I/O 12ts ...

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Serial Port Interface SYMBOL PIN I/O CTSA CTSB# 55 DSRA DSRB RTSA# HEFRAS RTSB DTRA# PNPCSV ...

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Infrared Port SYMBOL PIN I/O IRRX IRTX CIRRX# 100 IN t 5.6 Flash ROM Interface SYMBOL PIN I/O XA18-XA16 66- GP57-GP55 I/OD 12t XA15-XA10 69- GP47-GP42 I/OD 12t XA9-XA8 ...

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Hardware Monitor Interface SYMBOL PIN I/O CASEOPEN# 101 IN t VBAT 102 Power VTIN2 103 AIN VTIN1 104 AIN VREF 106 AOUT VCORE 107 AIN +3.3VIN 108 AIN +12VIN 109 AIN -12VIN 110 AIN -5VIN 111 AIN FANIO[2:1] 113- ...

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Game Port & MIDI Port SYMBOL PIN I/O MSI 119 INt GP51 I/OD WDTO MSO 120 O 12 GP50 I/OD PLED O 12 GPAS2 121 INcsu GP17 I/OD 12csu GPBS2 122 INcsu GP16 I/OD 12csu GPAY 123 ...

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POWER PINS SYMBOL PIN VCC 5, 45, 75, VSB 99 VCC3V 22 AVCC 105 AGND 112 GND 18, 60, 90, FUNCTION +5V power supply for the digital circuitry. +5V stand-by power supply for the digital circuitry. +3.3V power supply ...

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HARDWARE MONITOR 6.1 General Description The W83697HF can be used to monitor several critical hardware parameters of the system, including power supply voltages, fan speeds, and temperatures, which are very important for a high-end computer system to work stable ...

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ISA ISA Data Address Bus Bus Port 5h Index Register Port 6h Data Register Figure 9.1 : ISA interface access diagram W83697HF/ HG Configuration Register 40h SMI# Status/Mask Registers 41h, 42h, 44h, 45h Fan Divisor Register 47h Device ID 48h ...

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Analog Inputs The maximum input voltage of the analog pin is 4.096V because the 8-bit ADC has a 16mv LSB. Really, the application of the PC monitoring would most often be connected to power suppliers. The CPU V-core voltage ...

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Monitor over 4.096V voltage: The input voltage +12VIN can be expressed as following equation. The value of R1 and R2 can be selected to 28K Ohms and 10K Ohms, respectively, when the input voltage V1 is 12V. The node ...

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The another negative voltage input V3 (approximate -5V) also can be evaluated by the similar method and the serial resistors can be selected with R5=120K ohms and R6=56K ohms by the Winbond recommended. The expression equation of V3 With -5V ...

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Bipolar Transistor Temperature Sensor C B 2N3904 E OR Pentium II CPU Therminal Diode 6.4 FAN Speed Count and FAN Speed Control 6.4.1 Fan speed count Inputs are provides for signals from fans equipped with tachometer outputs. The level of ...

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NOMINAL DIVISOR PRM 1 8800 4400 2 (default) 4 2200 8 1100 16 550 32 275 64 137 128 68 +12V +5V Pull-up resister 4.7K Ohms diode +12V Fan Input FAN Out GND FAN Connector Fan with Tach Pull-Up to ...

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Fan speed control The W83697HF provides 2 sets for fan PWM speed control. The duty cycle of PWM can be programmed by a 8-bit registers which are defined in the Bank0 CR5A and CR5B. The default duty cycle is ...

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SMI# interrupt mode 6.5.1 Voltage SMI# mode : SMI# interrupt for voltage is Two-Times Interrupt Mode. Voltage exceeding high limit or going below low limit will causes an interrupt if the previous interrupt has been reset by reading all ...

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The W83697HF temperature sensor 1 SMI# interrupt has two modes: (1) Comparator Interrupt Mode Setting the T (Temperature Hysteresis) limit to 127°C will set temperature sensor 1 SMI# to HYST the Comparator Interrupt Mode. Temperature exceeds T interrupt and ...

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The W83697HF temperature sensor 2 SMI# interrupt has two modes and it is programmed at CR[4Ch] bit 6. (1) Comparator Interrupt Mode Temperature exceeding T Interrupt Status Register. Once an interrupt event has occurred by exceeding T the temperature ...

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OVT# interrupt mode The OVT# signal is only related with temperature sensor 2 (VTIN2 ). 6.6.1 The W83697HF temperature sensor 2 Over-Temperature (OVT#) has the following modes (1) Comparator Mode : Setting Bank1/2 CR[52h] bit will ...

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REGISTERS AND RAM Address Register (Port x5h) Data Port: Power on Default Value Attribute: Size: Bit7: Read Only The logical 1 indicates the device is busy because of a Serial Bus transaction or another LPC bus transaction. With checking ...

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Address Pointer Index (A6-A0) A6-A0 REGISTERS AND RAM IN HEX Configuration Register Interrupt Status Register 1 Interrupt Status Register 2 SMI#Ý Mask Register 1 SMIÝ Mask Register 2 NMI Mask Register 1 NMI Mask Register 2 Fan Divisor Register Reserved ...

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Address Pointer Index (A6-A0), continued REGISTERS AND RAM POST RAM Value RAM Value RAM Temperature 2 Registers Reserved Additional Configuration Registers POWER ON VALUE OF A6-A0 REGISTERS: <K7:0>IN IN HEX BINARY 00-1Fh 20-3Fh 60-7Fh Bank1 50h-56h Bank2 50h-56h Bank4 50h- ...

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Data Register (Port x6h) Data Port: Power on Default Value Attribute: Size: Bit 7-0: Data to be read from written to RAM and Register. Configuration Register  Index 40h Register Location: Power on Default Value Attribute: Size: ...

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Interrupt Status Register 1 Index 41h Register Location: Power on Default Value Attribute: Size: Bit 7: A one indicates the fan count limit of FAN2 has been exceeded. Bit 6: A one indicates the fan count limit of FAN1 has ...

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Bit 7-6:Reserved.This bit should be set to 0. Bit 5: Reserved. Bit 4: A one indicates case has been opened. Bit 3: Reserved. Bit 2: A one indicates a High or Low limit of -5VIN has been exceeded. Bit1: A ...

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Reserved Register  Index 45h Chassis Clear Register -- Index 46h Register Location: Power on Default Value Attribute: Size: 7 Bit 7: Set 1 , clear case open event. This bit self clears after clearing case open event. Bit 6-0:Reserved. ...

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Value RAM  Index 20h- 3Fh or 60h - 7Fh (auto-increment) ADDRESS A6- ADDRESS A6-A0 WITH A0 AUTO-INCREMENT 20h 60h 21h 61h 22h 62h 23h 63h 24h 64h 25h 65h 26h 66h 27h 67h 28h 68h 29h 69h 2Bh 6Bh ...

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Value RAM  Index 20h- 3Fh or 60h - 7Fh (auto-increment), continued ADDRESS A6- ADDRESS A6-A0 WITH A0 AUTO-INCREMENT 36h 37h 38h 39h 3Ah 7Ah 3Bh 7Bh 3Ch 7Ch 3Dh 7Dh 3E- 3Fh 7E- 7Fh Setting all ones to the ...

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SMI#/OVT# Property Select Register- Index 4Ch Register Location: Power on Default Value Attribute: Size Bit 7: Reserved. User Defined. Bit6: Set to 1, the SMI# output type of Temperature 2(VTIN2) is set to Comparator Interrupt mode. Set to ...

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Bit 7~4: Reserved. Bit 3: FAN 2 output value if FANINC2 sets to 0. Write 1, then pin 113 always generate logic high signal. Write 0, pin 113 always generates logic low signal. This bit default 0. Bit 2: ...

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Winbond Vendor ID Register - Index 4Fh (No Auto Increase) Register Location: Power on Default Value Attribute: Size: 15 Bit 15-8: Vendor ID High Byte if CR4E.bit7=1.Default 5Ch. Bit 7-0: Vendor ID Low Byte if CR4E.bit7=0. Default A3h. Winbond Test ...

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Bit 4: Enable BEEP output for Temperature Sensor 1 if the monitor value exceed the limit value. Write 1, enable BEEP output. Default 0 Bit 3: Enable BEEP output from AVCC (+5V), Write 1, enable BEEP output if the monitor ...

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Chip ID -- Index 58h (Bank 0) Register Location: Power on Default Value Attribute: Size Bit 7: Winbond Chip ID number. Read this register will return 60h. Register -- Index 59h (Bank 0) Register Location: Power on Default ...

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Reserved -- Index 5Ah (Bank 0) Reserved -- Index 5Bh (Bank 0) Reserved -- Index 5Ch (Bank 0) ACPI Temperature Increment Register -- Index 5Fh (Bank 0) Register Location: Power on Default Value Attribute: Size: Bit Name Attribute 7 Reserved ...

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Fan divisor table : BIT 2 BIT 1 BIT Reserved Register -- 5Eh (Bank 0) Reserved Register -- 5Fh (Bank 0) Temperature Sensor 2 Temperature (High Byte) ...

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Temperature Sensor 2 Configuration Register - Index 52h (Bank 1) Register Location: Power on Default Value Size: 7 Bit 7-5: Read - Reserved. This bit should be set to 0. Bit 4-3: Read/Write - Number of faults to detect before ...

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Temperature Sensor 2 Hysteresis (Low Byte) Register - Index 54h (Bank 1) Register Location: Power on Default Value Attribute: Size Bit 7: Hysteresis temperature bit 0, which is low Byte. Bit 6-0: Reserved. Temperature Sensor 2 Over-temperature (High ...

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Temperature Sensor 2 Over-temperature (Low Byte) Register - Index 56h (Bank 1) Register Location: Power on Default Value Attribute: Size: 7 Bit 7: Over-temperature bit 0, which is low Byte. Bit 6-0: Reserved. Interrupt Status Register 3 -- Index 50h ...

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SMI# Mask Register 3 -- Index 51h (BANK 4) Register Location: Power on Default Value Attribute: Size: 7 Bit 7-2: Reserved. Bit 1: A one disables the corresponding interrupt status bit for SMI interrupt. Bit 0: A one disables the ...

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Temperature Sensor 1 Offset Register -- Index 54h (Bank 4) Register Location: Power on Default Value Attribute: Size Bit 7-0: Temperature 1 base temperature. The temperature is added by both monitor value and offset value. Temperature Sensor 2 ...

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Real Time Hardware Status Register I -- Index 59h (Bank 4) Register Location: Power on Default Value Attribute: Size Bit 7: FAN 2 Status. Set 1, the fan speed counter is over the limit value. Set 0, the ...

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Bit 7-6: Reserved Bit 5: Reserved Bit 4: Case Open Status. Set 1, the case open sensor is sensed the high value. Set 0 Bit 3: Reserved Bit 2: -5V Voltage Status. Set 1, the voltage of -5V is ...

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Reserved Register -- Index 5Ch (Bank 4) Reserved Register -- Index 5Dh (Bank 4) Value RAM 2 Index 50h - 5Ah (auto-increment) (BANK 5) ADDRESS A6-A0 AUTO-INCREMENT 50h 5VSB reading 51h VBAT reading 52h Reserved 53h Reserved 54h 5VSB High ...

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FAN 1 Duty Cycle Select Register-- 01h (Bank 0) Power on default [7:0] 1111,1111 b BIT NAME READ/WRITE 7-0 F1_DC[7:0] Read/Write FAN 2 Pre-Scale Register-- Index 02h Power on default [7:0] = 0000,0001 b BIT NAME 7 PWM_CLK_SEL2 6-0 PRE_SCALE2[6:0] ...

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FAN2 Duty Cycle Select Register-- Index 03h Power on default [7:0] = 1111,1111 b BIT NAME READ/WRITE 7-0 F2_DC[7:0] Read/Write FAN Configuration Register-- Index 04h Power on default [7:0] = 0000,0000 b BIT NAME READ/WRITE 7-2 Reserved Read/Write 5-4 FAN2_MODE ...

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VTIN1 Target Temperature Register/ Fan 1 Target Speed Register -- Index 05h Power on default [7:0] = 0000,0000 b CPUT1 target temperature register for Thermal Cruise mode. BIT NAME 7 Reserved 6-0 TEMP_TAR_T1[6:0] Fan 1 target speed register for Fan ...

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Tolerance of Target Temperature or Target Speed Register -- Index 07h Power on default [7:0] = 0001,0001 b Tolerance of CPUT1/CPUT2 target temperature register. BIT NAME READ/WRITE 7-4 TOL_T2[3:0] 3-0 TOL_T1[3:0] Tolerance of Fan 1/2 target speed register. BIT NAME ...

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Fan 1 Start-up Duty Cycle Register -- Index 0Ah Power on default [7:0] = 0000,0001 b BIT NAME 7-0 START_DC1[7:0] Fan 2 Start-up Duty Cycle Register -- Index 0Bh Power on default [7:0] = 0000,0001 b BIT NAME 7-0 START_DC2[7:0] ...

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Fan Step Down Time Register -- Index 0Eh Power on defualt [7:0] = 0000,1010 b BIT NAME READ/WRITE 7-0 STEP_UP_T[7:0] Read/Write Fan Step Up Time Register -- Index 0Fh Power on default [7:0] = 0000,1010 b BIT NAME 7-0 STEP_DOWN_T[7:0] ...

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CONFIGURATION REGISTER 7.1 Plug and Play Configuration The W83697HF uses Compatible PNP protocol to access configuration registers for setting up different types of configurations. Device 0 to Logical Device B with the exception of logical device 4 for backward ...

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The designer can also set bit 5 of CR26 (LOCKREG) to high to protect the configuration registers against accidental accesses. The configuration registers can be reset to their default or hardware settings only by a cold reset (pin MR ...

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Software programming example The following example is written in Intel 8086 assembly language. It assumes that the EFER is located at 2Eh, so EFIR is located at 2Eh and EFDR is located at 2Fh. If HEFRAS (CR26 bit 6) ...

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Chip (Global) Control Register CR02 (Default 0x00, Write Only) Bit Reserved. Bit 0: SWRST --> Soft Reset. CR07 Bit LDNB7 - LDNB0 --> Logical Device Number Bit CR20 Bit 7 ...

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CR23 (Default 0x00) Bit Reserved. Bit 0: IPD (Immediate Power Down). When set will put the whole chip into power down mode immediately. CR24 (Default 0x00) Bit 7 : Reserved. Bit 6: CLKSEL(Enable 48Mhz) ...

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CR26 (Default 0x00) Bit 7: SEL4FDD = 0 Select two FDD mode Select four FDD mode. Bit 6: HEFRAS These two bits define how to enable Configuration mode. The corresponding power-on setting pin is RTSA #(pin 49). HEFRAS ...

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CR28 (Default 0x00) Bit Reserved. Bit PRTMODS2 - PRTMODS0 = 0xx Parallel Port Mode = 100 Reserved = 101 External FDC Mode = 110 Reserved = 111 External two FDC Mode CR29 (GPIO1,5(50~51) & ...

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CR2A(GPIO2 ~ 5& Flash ROM Interface Select Default 0xFF if PENROM during POR, default 0x00 otherwise) Bit 7 : (PIN 86 ~89 & 91 ~94 GPIO Flash IF (xD7 ~ XD0) Bit 6 ...

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Logical Device 0 (FDC) CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise) Bit Reserved. Bit Activates the logical device Logical device is inactive. CR60 (Default ...

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Bit 4: Swap Drive 0, 1 Mode = 0 No Swap (Default Drive and Motor select 0 and 1 are swapped. Bit Interface Mode = 11 AT Mode (Default (Reserved PS/2 ...

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CRF2 (Default 0xFF) Bit FDD D Drive Type Bit FDD C Drive Type Bit FDD B Drive Type Bit FDD A Drive Type CRF4 (Default 0x00) FDD0 Selection: ...

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TABLE B DTYPE0 DTYPE1 DRVDEN0(PIN SELDEN 0 1 DRATE1 1 0 SELDEN 1 1 DRATE0 7.6 Logical Device 1 (Parallel Port) CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise) Bit ...

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CRF0 (Default 0x3F) Bit 7: Reserved. Bit ECP FIFO Threshold. Bit Parallel Port Mode (CR28 PRTMODS2 = 0) = 100 Printer Mode (Default) = 000 Standard and Bi-direction (SPP) mode = 001 EPP - ...

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Logical Device 3 (UART B) CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise) Bit Reserved. Bit Activates the logical device Logical device is inactive. CR60 ...

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IR MODE IR FUNCTION 00X Disable 010* IrDA 011* IrDA 100 ASK-IR 101 ASK-IR 110 ASK-IR 111* ASK-IR Note: The notation is normal mode in the IR function. Bit 2: HDUPLX. IR half/full duplex function select The IR ...

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Logical Device 7 (Game Port GPIO Port 1) CR30 (Default 0x00) Bit Reserved. Bit Activate Game Port./GP1 = 0 Game Port/GP1 is inactive. CR60 (Default 0x02, 0x01 if PNPCSV = 0 ...

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Logical Device 8 (MIDI Port and GPIO Port 5) CR30 (MIDI Port Default 0x00) Bit Reserved. Bit MIDI/GP5 port is Activate = 0 MIDI/GP5 port is inactive. CR60 (Default 0x03, 0x30 ...

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CRF3 (PLED mode register. Default 0x00) Bit Reserved . Bit 2: select WDTO# count mode second = 1 minute Bit select PLED mode = 00 Power LED pin is tri-stated. = ...

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Logical Device 9 (GPIO Port 2 ~ GPIO Port 4 ) CR30 (Default 0x00) Bit Reserved. Bit Activate GPIO4 GPIO4 is inactive Bit Activate GPIO3 GPIO3 ...

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CRF7 (GP4 data register. Default 0x00 ) If a port is programmed output port, then its respective bit can be read/written port is programmed input port, then its respective bit can only ...

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Logical Device A (ACPI) CR30 (Default 0x00) Bit Reserved. Bit Activates the logical device Logical device is inactive. CR70 (Default 0x00) Bit Reserved. Bit These ...

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CRE7 (Default 0x00) Bit Reserved. Bit 2:Reset CIR Power-On function. After using CIR power-on, the software should write logical 1 to restart CIR power-on function. Bit 1: Invert RX Data Inverting RX Data ...

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CRF1 (Default 0x00) Bit 7: WAK_STS. This bit is set when the chip is in the sleeping state and an enabled resume event occurs. Upon setting this bit, the sleeping/working state machine will transition the system to the working state. ...

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CRF6 (Default 0x00) Bit Reserved. Return zero when read. PME Bit Enable bits of the These bits enable the generation of an SMI / PME SMI / logic output = (PRTIRQEN and PRTIRQSTS) or ...

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Bit 2: WDTIRQEN disable the generation of an SMI / = 1 enable the generation of an SMI / SMI interrupt due to watch dog timer's IRQ. Bit 1: CIRIRQEN disable the generation of an SMI ...

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Logical Device B (Hardware Monitor) CR30 (Default 0x00) Bit Reserved. Bit Activates the logical device Logical device is inactive. CR60 (Default 0x00, 0x00) These two registers select Hardware Monitor ...

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SPECIFICATIONS 8.1 Absolute Maximum Ratings PARAMETER Power Supply Voltage (5V) Input Voltage RTC Battery Voltage V BAT Operating Temperature Storage Temperature Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability ...

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DC CHARACTERISTICS, continued PARAMETER SYM. I/O - TTL level bi-directional pin with 24mA source-sink capability 24t Input Low Voltage V IL Input High Voltage V IH Output Low Voltage V OL Output High Voltage V OH Input High Leakage ...

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DC CHARACTERISTICS, continued PARAMETER Input High Leakage Input Low Leakage I/O – 3.3V TTL level Schmitt-trigger bi-directional pin with 24mA source-sink capability 24tsp3 Input Low Threshold Voltage Input High Threshold Voltage Hystersis Output Low Voltage Output High Voltage Input ...

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DC CHARACTERISTICS, continued PARAMETER I/OD - Bi-directional pin with analog input and open-drain output with 24mA sink 24a capability Output Low Voltage Input High Leakage Input Low Leakage I/OD 12ts - TTL level Schmitt-trigger bi-directional pin and open drain ...

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DC CHARACTERISTICS, continued PARAMETER SYM. I/OD - CMOS level Schmitt-trigger bi-directional pin and open drain output with 16mA 16 cs sink capability Input Low Threshold Voltage Input High Threshold Voltage Hystersis Output Low Voltage Input High Leakage Input Low ...

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DC CHARACTERISTICS, continued PARAMETER SYM. Input Low Leakage O - Output pin with 4mA source-sink capability 4 Output Low Voltage Output High Voltage O - Output pin with 8mA source-sink capability 8 Output Low Voltage Output High Voltage O ...

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DC CHARACTERISTICS, continued PARAMETER IN - TTL level input pin t Input Low Voltage Input High Voltage Input High Leakage Input Low Leakage IN - 3.3V TTL level input pin tp3 Input Low Voltage Input High Voltage Input High ...

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DC CHARACTERISTICS, continued PARAMETER SYM CMOS level input pin c Input Low Voltage V IL Input High Voltage V IH Input High Leakage I LIH Input Low Leakage I LIL IN - CMOS level input pin with ...

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APPLICATION CIRCUITS 9.1 Parallel Port Extension FDD 13 WE2/SLCT 25 12 WD2/ MOB2/BUSY 23 10 DSB2/ACK 22 9 PD7 21 8 PD6 20 7 PD5 19 6 DCH2/PD4 18 RDD2/PD3 5 17 STEP2/SLIN 4 WP2/PD2 16 DIR2/INIT ...

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Parallel Port Extension 2FDD 13 WE2/SLCT 25 12 WD2/PE 24 MOB2/BUSY DSB2/ACK 22 9 DSA2/PD7 21 8 MOA2/PD6 20 7 PD5 19 6 DCH2/PD4 18 RDD2/PD3 5 STEP2/SLIN 17 4 WP2/PD2 16 DIR2/INIT 3 TRK02/PD1 15 ...

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... Example: The top marking of W83697HG inbond W83697HG 421A2B28201234 1st line: Winbond logo 2nd line: the type number: W83697HF, W83697HG 3th line: the tracking code 421: packages made in '04, week 21 A: assembly house ID; A means ASE, S means SPIL.... etc. 2: Winbond internal use. ...

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PACKAGE DIMENSIONS (128-pin PQFP 102 65 103 128 See Detail F y Seating Plane Detail ...

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APPENDIX A : DEMO CIRCUIT W83697HF ROMCS# MEMR# MEMW# PME# CIRRX CASEOPEN 5VSB (To monitor battery voltage, VBAT this input should be VCC connected directly to battery 0.1u 0. 4.7K VCC3V 0.1u 103 VTIN2 VTIN2 ...

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COM PORT VCC +12V VCC +12V 16 5 NRTSA RTSA# DA1 DY1 15 6 NDTRA DTRA# DA2 DY2 13 8 NSOUTA SOUTA DA3 DY3 19 2 NRIA RIA# RY1 RA1 18 3 NCTSA CTSA# RY2 RA2 17 ...

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GAME & MIDI PORT CIRCUIT R14 2.2K MSI GPSA2 GPSB2 GPY1 GPY2 MSO GPX2 GPX1 GPSB1 GPSA1 R10 R11 R12 C28 C29 C30 C31 0.01U 0.01U 0.01U 0.01U FLASH ROM SELECT 2M-FLASH ROM, UNINSTALL R19 SELECT 4M-FLASH ...

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Hardware Monitor circuits Temperature Sensing RT1 10K 1% R25 10K 1% VREF (for system) THERMISTOR VTIN1 R26 30K D+ D+ (from Deschutes VTIN2 AGND C39 3300P PWM Circuit for FAN speed control +12V R35 4.7K Q1 R36 1K ...

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The version 0.1 is first schematics for W83697HF The version 0.2 change 1.update 697's library 2.The sheet 4 in Case open block,part 74HC14 is U4A & U4B changed to U5A & U5B The version 0.3 chage 1.Case-Open circuit(in page 4) ...

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... Add VOH of O12p3,O24p and OD8 3.P74 description in DC     5. The pin name WDTO” were replaced by    WDTO#” 4.P99 H/W monitor data correction   6 Add Pb-free part no of W83697HG 106 ADD Important Notice Publication Release Date: May 30, 2005 - 105 - W83697HF/ HG DESCRIPTION specification Revision A1 ...

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Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other ...

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