BD12KA5FP-E2 Rohm Semiconductor, BD12KA5FP-E2 Datasheet - Page 6

• Manufacturer Part Number: BD12KA5FP-E2
• Description: IC REG LDO 1.2V 0.5A TO252-3
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of BD12KA5FP-E2

• Regulator Topology: Positive Fixed
• Voltage - Output: 1.2V
• Voltage - Input: 2.3 V ~ 5.5 V
• Voltage - Dropout (typical): -
• Number Of Regulators: 1
• Current - Output: 500mA (Max)
• Current - Limit (min): -
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: TO-252-3, DPak (2 Leads + Tab), SC-63
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

●Terminal Vicinity Settings and Cautions
●Vo Terminal
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120
100
80
60
40
20
0
・Vcc Terminal
・GND Terminal
・CTL Terminal
Please be sure to attach an anti-oscillation capacitor between V
Be sure to place an anti-oscillation capacitor between the output terminal and the GND. Oscillations may arise if the
capacitance value changes, due to factors such as temperature changes. A 1μF capacitor with small internal series
resistance (ESR) such as a ceramic capacitor is recommended as an anti-oscillation capacitor. Ceramic capacitors generally
have favorable temperature characteristics and DC bypass characteristics. When selecting a ceramic capacitor, a high
voltage capacitor (good DC bypass characteristics) with temperature characteristics that are superior to those of X5R or X7R,
is recommended. In applications where input voltage and load fluctuations are rapid, please decide on a capacitor after
sufficiently confirming its properties according to its specifications in the actual application.
0
IC
Please attach a capacitor (greater than 1μF) between Vcc and GND.
The capacitance values differ depending on the application, so chose a capacitor with sufficient margin and verify the
operation on actual board.
Please be sure to keep the set ground and IC ground at the same potential level so that a potential difference does not
arise between them. If a potential difference arises between the set ground and the IC ground, the preset voltage will not
be output properly, causing the system to become unstable. Please reduce the impedance by making the ground patterns
as wide as possible and reducing the distance between the set ground and the IC ground as much as possible.
(a)
Fig.24 Output Equivalent Circuit
直流バイアスVdc（V)
Capacitance-bypass
characteristics (Y5V)
1
DC bypass Vdc(V)
10V Max.Input
CTL
Fig.23 Input equivalent circuit
2
50V Max.Input
16V Max.Input
3
OUT
31.25kΩ
25kΩ
1μF
4
Fig.26 :General characteristics of ceramic capacitors
120
100
80
60
40
20
0
0
（b）Capacitance-bypass
0.01
100
0.1
characteristics（X5R,X7R）
10
1
0
直流バイアスVdc（V)
1
DC bypass Vdc(V)
Vcc
100
6/9
V
CTL
2V
Fig.25 ESR-Io Characteristics
2
10V Max.Input
1μF
16V Max.Input
Cin
o
The CTL terminal is turned ON at 2.0V and higher, and OFF at
0.8V and lower, within the operating power supply voltage
range.The power supply and the CTL terminal may be started
up and shut down in any order without problems.
200
and GND.
CTL GND ADJ
50V Max.Input
Iout(mA)
3
Vcc
Stable region
安定領域
R1=30kΩ,R2=2kΩ
OUT
300
Oscillation region
発振領域
R2
R1
1μF
4
ESR
Io(R
400
OUT
)
120
100
80
60
40
20
Io(mA)
0
-25
500
（C）Capacitance-temperature
characteristics（X5R,X7R,Y5V）
0
Temp(℃)
Y5V
Temp(℃)
25
Vdc=0
Technical Note
2009.04 - Rev.A
50
X7R
X5R
75