DS33X82+ Maxim Integrated Products, DS33X82+ Datasheet - Page 9

IC MAPPING ETHERNET 256CSBGA

DS33X82+

Manufacturer Part Number
DS33X82+
Description
IC MAPPING ETHERNET 256CSBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33X82+

Applications
Data Transport
Interface
Serial
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
256-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.
The DS33X162 family of devices provide interconnection and mapping functionality between Ethernet Systems and
WAN Time-Division Multiplexed (TDM) systems such as T1/E1/J1, HDSL, T3/E3, and SONET/SDH. The device is
composed of up to two 10/100/1000 Ethernet MACs, up to 16 Serial Ports, a Arbiter, GFP-F /HDLC/cHDLC/X.86
(LAPS) Mappers, a DDR SDRAM interface, and control ports. Ethernet traffic is encapsulated with GFP-F, HDLC,
cHDLC, or X.86 (LAPS) to be transmitted over the WAN Serial Interfaces. The WAN Serial Interfaces also receive
encapsulated Ethernet frames and transmit the extracted frames over the Ethernet ports. The LAN frame interface
consists of Ethernet interfaces using one of two physical layer protocols. It can be configured with up to two
10/100Mbps MII/RMII ports or a single GbE GMII port. The WAN Serial Interface can be configured for up to eight
serial data streams at up to 52Mbps each, or 16 serial data streams at up to 2.5Mbps each. The Serial Interfaces
can be seamlessly connected to the Maxim T1/E1/J1 Framers, Line Interface Units (LIUs), and Single-Chip
Transceivers (SCTs). The WAN interfaces can also be seamlessly connected to the Maxim T3/E3/STS-1 Framers,
LIUs, and SCTs to provide T3, E3, or STS1 connectivity.
Microprocessor control can be accomplished through a 8-bit Micro controller port or SPI Bus. The device has a
125MHz DDR SDRAM controller and interfaces to a 32-bit wide 256Mb DDR SDRAM via a 16-bit data bus. The
DDR SDRAM is used to buffer data from the Ethernet and WAN ports for transport.
The power supplies consist of a 1.8V core supply, a 2.5V DDR SDRAM supply, and 3.3V I/O supply. The DDR
interface also requires a 1.25V reference voltage that can be obtained through a resistor-divider network.
Table 1-1. Product Selection Matrix
Rev: 063008
DS33X161+
DS33X162+
DS33W11+
DS33W41+
DS33X11+
DS33X41+
DS33X42+
DS33X81+
DS33X82+
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
Ordering
Number
Detailed Description
10/100/GbE
10/100/GbE
10/100/GbE
10/100/GbE
10/100/GbE
10/100/GbE
Ethernet
or 1 GbE
or 1 GbE
or 1 GbE
2 10/100
2 10/100
2 10/100
Ports
1
1
1
1
1
1
Ports
TDM
16
16
1
1
4
4
4
8
8
Voice
Ports
0
1
0
1
0
0
0
0
0
Forwarding
Support
VLAN
Yes
Yes
Yes
No
No
No
No
No
No
Forwarding
Supported
1, 2, 3, 4, 5
1, 2, 3, 4, 5
1, 2, 3, 5
Modes
1, 2, 3
2
2
2
2
2
1, 2, 3, 4
1, 2, 3, 4
Groups
(VCGs)
WAN
1 & 3
1 & 3
1
1
1
1
1
Control
Parallel
Parallel
Parallel
Parallel
Parallel
Parallel
Parallel
Parallel
SPI or
SPI or
SPI or
SPI or
SPI or
SPI or
SPI or
SPI or
SPI
μP
10mm 144
17mm 256
17mm 256
17mm 256
17mm 256
17mm 256
17mm 256
17mm 256
17mm 256
Package
CSBGA
CSBGA
CSBGA
CSBGA
CSBGA
CSBGA
CSBGA
CSBGA
CSBGA
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