MAX5982CETE+ Maxim Integrated Products, MAX5982CETE+ Datasheet - Page 8

• Manufacturer Part Number: MAX5982CETE+
• Description: Power Switch ICs - POE / LAN PDIC, up to 70W
• Manufacturer: Maxim Integrated Products

Specifications of MAX5982CETE+

• Lead Free Status / Rohs Status: Details

IEEE 802.3af/at-Compliant, Powered Device Interface
Controllers with
8
MAX5982A/
MAX5982B
______________________________________________________________________________________
11
12
13
14
15
16
––
PIN
MAX5982C
11
12
––
––
––
––
––
NAME
2EC
CLS
LED
ULP
WK
SL
EP
Integrated 70W High-Power MOSFET
2-Event Classification Detect or Wall Adapter Detect Output. A 1.5mA current sink is
enabled at 2EC when a Type 2 PSE or a wall adapter is detected. When powered by
a Type 2 PSE, the 2EC current sink is enabled after the isolation MOSFET is fully on
until V
PSE until V
supply, typically greater than 9V, is applied between WAD and RTN. 2EC is not latched if
asserted by WAD. The 2EC current sink is turned off when the device is in sleep mode.
Classification Resistor Input. Connect a resistor (R
desired classification current. See the classification current specifications in the Electrical
Characteristics table to find the resistor value for a particular PD classification.
LED Driver Output. During sleep mode, LED sources a periodic current (I
with 25% duty cycle. The amplitude of I
A) = 645.75/(R
Sleep Mode Enable Input. In the MAX5982B, a falling edge on SL brings the device into
sleep mode (V
the threshold (0.75V) for a period of at least 6s after falling edge to bring the device into
sleep mode. An external resistor (R
current (I
Wake Mode Enable Input. WK has an internal 2.5kI pullup resistor to the internal 5V
bias rail. A falling edge on WK brings the device out of sleep mode and into the normal
operating mode (wake mode).
Ultra-Low-Power Sleep Enable Input (in Sleep Mode). ULP has an internal 50kI pullup
resistor to the internal 5V bias rail. A falling edge on SL in the MAX5982B (and a 6s
period below the SL threshold in the MAX5982A) while ULP is asserted low enables
ultra-low-power sleep mode. When ultra-low-power sleep mode is enabled, the power
consumption of the device is reduced even lower than normal sleep mode to comply with
ultra-low-power sleep power requirements while still supporting MPS.
Exposed Pad. Do not use EP as an electrical connection to V
connected to V
optimize power dissipation, solder the exposed pad to a large copper power plane.
IN
drops below the UVLO threshold. 2EC is latched when powered by a Type 2
LED
IN
).
drops below the reset threshold. 2EC also asserts when a wall adapter
SL
SL
SS
must drop below 0.75V). In the MAX5982A, V
+ 1200).
through a resistive path and must be connected to V
SL
) connected between SL and V
FUNCTION
LED
Pin Description (continued)
is set by R
CLS
) from CLS to V
SL
according to the formula I
SS
SL
. EP is internally
must remain below
SS
SS
to set the
SS
sets the LED
LED
externally. To
) at 250Hz
LED
(in