LCMXO640E-3TN144C Lattice, LCMXO640E-3TN144C Datasheet - Page 95

• Manufacturer Part Number: LCMXO640E-3TN144C
• Description: IC PLD 640LUTS 113I/O 144-TQFP
• Manufacturer: Lattice
• Series: MachXOr

Specifications of LCMXO640E-3TN144C

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 4.9ns
• Voltage Supply - Internal: 1.14 V ~ 1.26 V
• Number Of Logic Elements/blocks: -
• Number Of Macrocells: 320
• Number Of Gates: -
• Number Of I /o: 113
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

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© 2005 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
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October 2005
For Further Information
A variety of technical notes for the MachXO family are available on the Lattice web site at www.latticesemi.com.
For further information on interface standards refer to the following web sites:
• MachXO sysIO Usage Guide (TN1091)
• MachXO sysCLOCK PLL Design and Usage Guide (TN1089)
• MachXO Memory Usage Guide (TN1092)
• Power Calculations and Considerations for MachXO Devices (TN1090)
• MachXO JTAG Programming and Configuration User’s Guide (TN1086)
• Minimizing System Interruption During Configuration Using TransFR Technology (TN1087)
• MachXO Density Migration (TN1097)
• IEEE 1149.1 Boundary Scan Testability in Lattice Devices
• JEDEC Standards (LVTTL, LVCMOS): www.jedec.org
• PCI: www.pcisig.com
6-1
MachXO Family Data Sheet
Supplemental Information
Further Information_01.1
Data Sheet