LFE2-20E-6F484I Lattice, LFE2-20E-6F484I Datasheet - Page 97

• Manufacturer Part Number: LFE2-20E-6F484I
• Description: IC FPGA 20KLUTS 331I/O 484-BGA
• Manufacturer: Lattice

Specifications of LFE2-20E-6F484I

• Lead Free Status / Rohs Status: Contains lead / RoHS non-compliant

Lattice Semiconductor
Figure 3-16. sysCONFIG Slave Serial Port Timing
Figure 3-17. Power-On-Reset (POR) Timing
Figure 3-18. Configuration from PROGRAMN Timing
V
V
1. Time taken from V
2. Device is in a Master Mode (SPI, SPIm).
3. The CFG pins are normally static (hard wired).
PROGRAMN
CCLK (input)
1. The CFG pins are normally static (hard wired)
CC
CCIO8
USER I/O
CFG[2:0]
CFG[2:0]
/ V
DONE
DONE
INITN
CCLK
CCAUX
1
INITN
CCLK
DOUT
DIN
2
3
1
/
CC
, V
CCAUX
t
t
DPPINIT
DINITD
or V
CCIO8
t
IODISS
, whichever is the last to cross the POR trip point.
t
PRGMRJ
t
ICFG
t
SUSCDI
t
VMC
3-46
t
SSCL
Valid
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
t
CODO
t
DINIT
t
SSCH
t
HSCDI
Valid