LFE2-50E-7FN672C Lattice, LFE2-50E-7FN672C Datasheet - Page 67

• Manufacturer Part Number: LFE2-50E-7FN672C
• Description: IC FPGA 50KLUTS 500I/O 672-BGA
• Manufacturer: Lattice

Specifications of LFE2-50E-7FN672C

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
MLVDS
The LatticeECP2/M devices support the differential MLVDS standard. This standard is emulated using complemen-
tary LVCMOS outputs in conjunction with a parallel resistor across the driver outputs. The MLVDS input standard is
supported by the LVDS differential input buffer. The scheme shown in Figure 3-5 is one possible solution for
MLVDS standard implementation. Resistor values in Figure 3-5 are industry standard values for 1% resistors.
Figure 3-5. MLVDS (Multipoint Low Voltage Differential Signaling)
Table 3-6. MLVDS DC Conditions
For further information about LVPECL, RSDS, MLVDS, BLVDS and other differential interfaces please see the list
of additional technical information at the end of this data sheet.
16mA
16mA
V
Z
R
R
R
V
V
V
V
I
1. For input buffer, see LVDS table.
DC
Parameter
OUT
CCIO
OH
OL
OD
CM
S
TL
TR
2.5V
2.5V
2.5V
2.5V
+
+
-
-
35ohms
35ohms
Output Driver Supply (+/-5%)
Driver Impedance
Driver Series Resistor (+/-1%)
Driver Parallel Resistor (+/-1%)
Receiver Termination (+/-1%)
Output High Voltage
Output Low Voltage
Output Differential Voltage
Output Common Mode Voltage
DC Output Current
R
R
S
S
=
=
R
TL
2.5V
50 to 70 ohms +/-1%
1
1
6
m
35ohms
A
R
S
Description
Heavily loaded backplace, effective Zo~50 to 70 ohms differential
=
2.5V
1
6
m
35ohms
A
R
S
=
3-16
. . .
. . .
2.5V
1
6
Zo=50Ω
m
10.00
35.00
50.00
50.00
21.74
50 to 70 ohms +/-1%
A
2.50
1.52
0.98
0.54
1.25
35ohms
R
S
DC and Switching Characteristics
2.5V
LatticeECP2/M Family Data Sheet
=
Typical
1
6
m
A
35ohms
R
Zo=70Ω
S
10.00
35.00
70.00
70.00
20.00
=
2.50
1.60
0.90
0.70
1.25
35ohms
35ohms
R
R
R
TR
S
S
=
=
Units
mA
Ω
Ω
Ω
Ω
V
V
V
V
V
2.5V
2.5V
+
-
16mA
16mA