ADL5330ACPZ-WP Analog Devices Inc, ADL5330ACPZ-WP Datasheet - Page 19

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ADL5330ACPZ-WP

Manufacturer Part Number
ADL5330ACPZ-WP
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADL5330ACPZ-WP

Number Of Channels
1
Supply Current
215(Typ)@5VmA
Frequency (max)
3GHz
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Power Dissipation
1.1W
Package Type
LFCSP EP
Mounting
Surface Mount
Pin Count
24
Noise Figure (typ)
14.7@2700MHzdB
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
CDMA2000 TRANSMIT APPLICATION
To test the compliance to the CDMA2000 base station standard,
an 880 MHz, three-carrier CDMA2000 test model signal
(forward pilot, sync, paging, and six traffic, as per 3GPP2
C.S0010-B, Table 6.5.2.1) was applied to the ADL5330. A cavity-
tuned filter with a 4.6 MHz pass band was used to reduce noise
from the signal source being applied to the device.
Figure 46 shows the spectrum of the output signal under
nominal conditions. Total P
equal to 0.46 dBm and V
channel power ratio is measured in a 30 kHz bandwidth at
750 kHz and 1.98 MHz carrier offset, respectively.
In testing, by holding the gain control voltage steady at 1.4 V,
input power was swept. Figure 47 shows ACPR and noise floor
vs. total output power. Noise floor is measured at 1 MHz
bandwidth at 4 MHz carrier offset.
at −23 dBm Total Input Power, V
Figure 46. 880 MHz Output Spectrum, Three-Carrier CDMA2000 Test Model
Figure 47. ACPR vs. Total Output Power, 880 MHz Three-Carrier CDMA2000
1.98 MHz Carrier Offset, Input Signal Filtered Using a Cavity Tuned Filter
Test Model; V
–100
–110
–120
–100
–110
–30
–40
–50
–60
–70
–80
–90
–10
–20
–30
–40
–50
–60
–70
–80
–90
–30
REF LVL
–10dBm
CENTER 880MHz
1 AVG
0.4 dB OFFSET
ACPR 1.98MHz OFFSET
–25
CL3
NOISE 4MHz OFFSET
GAIN
CL3
ACPR 750kHz OFFSET
MARKER 1 [T1]
= 1.4 V (Fixed), ACPR Measured in 30 kHz Bandwidth at
–20
750 kHz and 1.98 MHz Carrier Offset
880.00000000MHz
TOTAL OUTPUT POWER (dBm)
CL2
CL2
–15
(Pass Band = 4.6 MHz)
–18.55dBm
CL1
CL1
GAIN
C0
–10
GAIN
OUT
1.5MHz/
= 1.4 V. Adjacent and alternate
= 1.4 V, ACPR Measured at 750 kHz and
1
of the three-carrier signal is
–5
RBW 30kHz
VBW 300kHz
SWT 200ms
C0
CU1
CU1
1 [T1]
CH PWR
ACP Up
ACP Low
ALT1 Up
ALT1 Low
ALT2 Up
ALT2 Low
0
CU2
CU2
5
CU3
RF ATT 10dB
MIXER –10dBm
UNIT
SPAN 15MHz
–18.55dBm
CU3
10
–65.13dB
–64.40dB
–89.05dB
–83.68dB
–80.72dB
–81.24dB
0.46dBm
880MHz
dBm
15
–0
–10
–20
–30
–40
–50
–60
–70
–80
–90
1RM
EXT
A
Rev. A | Page 19 of 24
The results show that up to a total output power of +8 dBm,
ACPR remains in compliance with the standard (<−45 dBc @
750 kHz and <−60 dBc @ 1.98 MHz). At low output power
levels, ACPR at 1.98 MHz carrier offset degrades as the noise
floor of the ADL5330 becomes the dominant contributor to
measured ACPR. Measured noise at 4 MHz carrier offset begins
to increase sharply above 0 dBm output power. This increase is
not due to noise but results from increased carrier-induced
distortion. As output power drops below 0 dBm total, the noise
floor drops towards −85 dBm.
With a fixed input power of −23 dBm, the output power was
again swept by exercising the gain control input. V
swept from 0 V to 1.4 V. The resulting total output power,
ACPR, and noise floor are shown in Figure 48.
Above V
standard. As the gain control input drops below 1.0 V, the noise
floor drops below −90 dBm.
SOLDERING INFORMATION
On the underside of the chip scale package, there is an exposed
compressed paddle. This paddle is internally connected to the
chip’s ground. Solder the paddle to the low impedance ground
plane on the printed circuit board to ensure specified electrical
performance and to provide thermal relief. It is also
recommended that the ground planes on all layers under the
paddle be stitched together with vias to reduce thermal
impedance.
CDMA2000 Test Model at −23 dBm Total Input Power; ACPR Measured in
Figure 48. Total Output Power and ACPR vs. V
–10
–20
–30
–40
–50
–60
10
0
0
ACPR 1.98MHz OFFSET
30 kHz Bandwidth at 750 kHz and 1.98 MHz Carrier Offset
GAIN
0.2
= 0.4 V, the ACPR is still in compliance with the
0.4
0.6
V
GAIN
NOISE 4MHz OFFSET
OUTPUT POWER
(V)
0.8
ACPR 750kHz OFFSET
1.0
GAIN
, 880 MHz Three-Carrier
1.2
GAIN
ADL5330
1.4
–30
–40
–50
–60
–70
–80
–90
–100
was

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