IDT54FCT574DB IDT, Integrated Device Technology Inc, IDT54FCT574DB Datasheet

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IDT54FCT574DB

Manufacturer Part Number
IDT54FCT574DB
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Dr
Datasheet

Specifications of IDT54FCT574DB

Logic Family
FCT
Technology
CMOS
Number Of Bits
8
Number Of Elements
1
Clock-edge Trigger Type
Positive-Edge
Polarity
Non-Inverting
Operating Supply Voltage (typ)
5V
Package Type
CDIP
Propagation Delay Time
14ns
Output Type
3-State
Low Level Output Current
32mA
High Level Output Current
-12mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-55C to 125C
Operating Temperature Classification
Military
Mounting
Through Hole
Pin Count
20
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT54FCT574DB
Manufacturer:
MOT
Quantity:
170
© 2002 Integrated Device Technology, Inc.
FEATURES:
• IDT54FCT574A equivalent to FAST™ speed and drive
• IDT54/74FCT574A up to 30% faster than FAST
• IDT74FCT574C up to 50% faster than FAST
• I
• CMOS power levels (1mW typ. static)
• Edge-triggered master/slave, D-type flip-flops
• Buffered common clock and buffered common 3-state control
• MIlitary product compliant to MIL-STD-883, Class B
• Meets or exceeds JEDEC Standard 18 specifications
• Available in the following packages:
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FUNCTIONAL BLOCK DIAGRAM
CP
OE
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
– Commercial: SOIC
– Military: CERDIP, LCC
OL
= 48mA (commercial) and 32mA (military)
CP
O
D
Q
0
0
D
CP
FAST CMOS OCTAL
D REGISTERS (3-STATE)
O
D
Q
1
1
D
CP
O
D
Q
2
2
D
1
CP
DESCRIPTION:
technology. These registers consist of eight D-type flip-flops with a buffered
common clock and buffered 3-state output control. When the output enable
(OE) is low, the eight outputs are enabled. When the OE input is high, the
outputs are in the high-impedance state.
is transferred to the O outputs on the low-to-high transition of the clock input.
The FCT574 has non-inverting outputs with respect to the data at the D
inputs.
The FCT574 is an 8-bit register built using an advanced dual metal CMOS
Input data meeting the set-up and hold time requirements of the D inputs
O
D
Q
3
3
D
MILITARY AND COMMERCIAL TEMPERATURE RANGES
CP
O
D
Q
4
4
D
CP
IDT54/74FCT574/A/C
O
D
Q
5
5
D
CP
O
D
Q
6
JUNE 2002
6
D
DSC-5428/2
CP
O
D
Q
7
7
D

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IDT54FCT574DB Summary of contents

Page 1

IDT54/74FCT574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) FEATURES: • IDT54FCT574A equivalent to FAST™ speed and drive • IDT54/74FCT574A up to 30% faster than FAST • IDT74FCT574C up to 50% faster than FAST • 48mA (commercial) and 32mA (military) ...

Page 2

IDT54/74FCT574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) PIN CONFIGURATION ...

Page 3

IDT54/74FCT574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: V Commercial 0°C to +70° 5.0V ±5%, Military Symbol Parameter V Input HIGH Level ...

Page 4

IDT54/74FCT574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) POWER SUPPLY CHARACTERISTICS V = 0.2V 0. Symbol Parameter I Quiescent Power Supply Current CC ∆I Quiescent Power Supply Current CC TTL Inputs HIGH I Dynamic ...

Page 5

IDT54/74FCT574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) SWITCHING CHARACTERISTICS OVER OPERATING RANGE Symbol Parameter t Propagation Delay PLH PHL t Output Enable Time PZH t PZL t Output Disable Time PHZ t PLZ t Set-up Time ...

Page 6

IDT54/74FCT574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) TEST CIRCUITS AND WAVEFORMS Pulse D.U.T Generator . R T Test Circuits for All Outputs DATA INPUT t SU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL ...

Page 7

IDT54/74FCT574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE) ORDERING INFORMATION IDT XX FCT XXXX Temp. Range Device Type CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 MILITARY AND COMMERCIAL TEMPERATURE RANGES XX X Package Process Blank ...

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