W78E51BP-40 Nuvoton Technology Corporation of America, W78E51BP-40 Datasheet - Page 16

• Manufacturer Part Number: W78E51BP-40
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W78E51BP-40

• Lead Free Status / Rohs Status: Supplier Unconfirmed

8.3.1
Notes:
8.3.2
Notes:
8.3.3
Notes:
Operating Speed
Clock Period
Clock High
Clock Low
Address Valid to ALE Low
Address Hold from ALE Low
ALE Low to PSEN Low
Data Hold after PSEN High
Data Float after PSEN High
ALE Pulse Width
ALE Low to RD Low
Data Hold from RD High
Data Float from RD High
PSEN Low to Data Valid
PSEN Pulse Width
RD Low to Data Valid
RD Pulse Width
1. The clock may be stopped indefinitely in either state.
2. The T
3. There are no duty cycle requirements on the XTAL1 input.
1. P0.0 − P0.7, P2.0 − P2.7 remain stable throughout entire memory cycle.
2. Memory access time is 3 T
3. Data have been latched internally prior to PSEN going high.
4. " Δ " (due to buffer driving delay and wire loading) is 20 nS.
1. Data memory access time is 8 T
2. " Δ " (due to buffer driving delay and wire loading) is 20 nS.
Clock Input Waveform
Program Fetch Cycle
Data Read Cycle
PARAMETER
PARAMETER
PARAMETER
CP
specification is used as a reference in other specifications.
XTAL1
CP
.
CP
SYMBOL
SYMBOL
.
T
T
T
T
T
F
T
T
T
DDH
DRD
DAR
DDA
DDZ
SYMBOL
OP
CP
CH
CL
T
T
T
T
T
T
T
T
PSW
PDH
ALW
AAS
AAH
PDA
PDZ
APL
3 T
6 T
T
CH
MIN.
- 16 -
MIN.
CP
CP
0
0
-
25
10
10
1 T
1 T
1 T
2 T
3 T
0
F
MIN.
-Δ
-Δ
OP,
CP
CP
CP
CP
CP
0
0
-
-Δ
-Δ
-Δ
-Δ
-Δ
T
CP
6 T
TYP.
TYP.
T
-
-
-
-
CP
CL
-
-
-
-
2 T
3 T
TYP.
-
-
-
-
-
-
CP
CP
3 T
MAX.
4 T
2 T
2 T
MAX.
40
CP
2 T
1 T
1 T
MAX.
-
-
-
-
CP
CP
CP
-
-
-
-
+Δ
-
CP
CP
CP
UNIT
MHz
UNIT
UNIT
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
W78E51B
NOTES
NOTES
NOTES
1, 2
1, 4
1
2
1
2
3
3
4
4
2
3
4
4