HN58V65AP-10 HITACHI, HN58V65AP-10 Datasheet - Page 24

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HN58V65AP-10

Manufacturer Part Number
HN58V65AP-10
Description
Manufacturer
HITACHI
Datasheet

Specifications of HN58V65AP-10

Lead Free Status / Rohs Status
Not Compliant

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HN58V65A Series, HN58V66A Series
2. Data protection at V
Note: The EEPROM shoud be kept in unprogrammable state during V
CE
OE
WE
V
V
Rev.3.00, Dec. 04.2003, page 22 of 26
: Don’t care.
CC
SS
: Pull-up to V
: Pull-down to V
When V
act as a trigger and turn the EEPROM to program mode by mistake. To prevent this unintentional
programming, the EEPROM must be kept in an unprogrammable state while the CPU is in an unstable
state.
2.1 Protection by CE, OE, WE
2.2 Protection by RES (only the HN58V66A series)
signal.
To realize the unprogrammable state, the input level of control pins must be held as shown in the
table below.
The unprogrammable state can be realized by that the CPU’s reset signal inputs directly to the
EEPROM’s RES pin. RES should be kept V
programming operation when RES becomes low, programming operation doesn’t finish correctly
in case that RES falls low during programming operation. RES should be kept high for 10 ms
after the last data input.
CC
is turned on or off, noise on the control pins generated by external circuits (CPU, etc) may
9-
or
CC
4-5
V
+-
level.
CC
SS
level.
CPU
CC
RESET
V
on/off
CC
V
*
Unprogrammable
CC
1 µs min
Program inhibit
100 µs min
V
SS
SS
level during V
10 ms min
*
Unprogrammable
CC
Program inhibit
on/off. The EEPROM breaks off
CC
on/off by using CPU RESET
V
CC

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