MC74HC164AN ON Semiconductor, MC74HC164AN Datasheet
MC74HC164AN
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MC74HC164AN Summary of contents
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... Wafer Lot Year Work Week Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. 1 MARKING DIAGRAMS 14 MC74HC164AN AWLYYWWG 1 14 HC164AG AWLYWW 164A ALYWG 74HC164A ALYWG ...
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... Q − data shifted from the preceding An Gn stage on a rising edge at the clock input. ORDERING INFORMATION Device MC74HC164AN MC74HC164ANG MC74HC164AD MC74HC164ADG MC74HC164ADR2 MC74HC164ADR2G MC74HC164ADTR2 MC74HC164ADTR2G MC74HC164AFEL MC74HC164AFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb− ...
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... Plastic DIP: – 10 mW/_C from 65_ to 125_C SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: − 6.1 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Î Î Î Î ...
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... NOTES: 1. For propagation delays with loads other than 50 pF, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). 2. Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). ...
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... NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D ...
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INPUTS A1, A2 (Pins 1, 2) Serial Data Inputs. Data at these inputs determine the data to be entered into the first stage of the shift register. For a high level to be entered into the shift register, both A1 ...
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CLOCK RESET CLOCK A1 A2 RESET EXPANDED LOGIC DIAGRAM Q D ...
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−T− SEATING PLANE 0.13 (0.005) PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE http://onsemi.com 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI ...
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... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...
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... S A −V− C 0.10 (0.004) −T− SEATING G D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...
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... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...