LH28F800SGHE-L10 Sharp Electronics, LH28F800SGHE-L10 Datasheet - Page 9

• Manufacturer Part Number: LH28F800SGHE-L10
• Manufacturer: Sharp Electronics

Specifications of LH28F800SGHE-L10

• Cell Type: NOR
• Density: 8Mb
• Access Time (max): 100ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 19b
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP-I
• Program/erase Volt (typ): 2.7/3.3/5/12V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 16b
• Number Of Words: 512K
• Supply Current: 65mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

3.5 Read Identifier Codes
The read identifier codes operation outputs the
manufacture code, device code, block lock
configuration codes for each block, and the
permanent lock configuration code (see Fig. 2).
Using the manufacture and device codes, the
system CPU can automatically match the device
with its proper algorithms. The block lock and
permanent lock configuration codes identify locked
and unlocked blocks and permanent lock-bit setting.
Fig. 2 Device Identifier Code Memory Map
7FFFF
78004
78003
78002
78001
78000
0FFFF
08004
08003
08002
08001
08000
07FFF
00004
00003
00002
00001
00000
Permanent Lock Configuration Code
Block 15 Lock Configuration Code
Block 1 Lock Configuration Code
Block 0 Lock Configuration Code
Future Implementation
Future Implementation
Future Implementation
Future Implementation
Future Implementation
(Blocks 2 through 14)
Manufacture Code
Reserved for
Reserved for
Reserved for
Reserved for
Reserved for
Device Code
Block 15
Block 1
Block 0
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3.6 Write
Writing commands to the CUI enable reading of
device data and identifier codes. They also control
inspection and clearing of the status register.
The Block Erase command requires appropriate
command data and an address within the block to
be erased. The Word Write command requires the
command and address of the location to be written.
Set Permanent and Block Lock-Bit commands
require the command and address within the device
(Permanent Lock) or block within the device (Block
Lock) to be locked. The Clear Block Lock-Bits
command requires the command and address
within the device.
The CUI does not occupy an addressable memory
location. It is written when WE# and CE# are
active. The address and data needed to execute a
command are latched on the rising edge of WE# or
CE# (whichever goes high first). Standard
microprocessor write timings are used. Fig. 14 and
Fig. 15 illustrate WE# and CE# controlled write
operations.
4 COMMAND DEFINITIONS
When the V
status register, identifier codes, or blocks are
enabled. Placing V
successful block erase, word write and lock-bit
configuration operations.
Device operations are selected by writing specific
commands into the CUI. Table 3 defines these
commands.
LH28F800SG-L/SGH-L (FOR TSOP, CSP)
PP
≤ V
PPLK
PPH1/2/3
, read operations from the
on V
PP
enables