LH28F016LLT-12 Sharp Electronics, LH28F016LLT-12 Datasheet
LH28F016LLT-12
Specifications of LH28F016LLT-12
Related parts for LH28F016LLT-12
LH28F016LLT-12 Summary of contents
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... Write During Erase – Command Superset of Sharp LH28F016SU • 10 µA (MAX CMOS Standby CC • 5 µA (MAX.) Deep Power-Down • State-of-the Art 0.6 µm ETOX™ Flash Technology • 56-Pin, 1.2 mm × × TSOP (Type I) Package 16M (1M × 16, 2M × 8) Flash Memory 56-PIN TSOP ...
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... INPUT Y-DECODER BUFFER ADDRESS QUEUE X-DECODER LATCHES ADDRESS COUNTER Figure 2. LH28F016LL Block Diagram (Architectural Evolution Includes Page Buffers, Queue Registers and Extended Status Registers) 2 16M (1M × 16, 2M × 8) Flash Memory OUTPUT INPUT BUFFER BUFFER DATA ID QUEUE REGISTER REGISTERS CSR PAGE BUFFERS ...
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... Flash Memory PIN DESCRIPTION SYMBOL TYPE BYTE-SELECT ADDRESS: Selects between high and low byte when device INPUT mode. This address is latched in x8 Data Writes. Not used in x16 mode (i.e., the A 0 input buffer is turned off when BYTE is high). ...
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... NO CONNECT: No internal connection to die, lead may be driven or left floating GROUND SS 4 NAME AND FUNCTION » transitions low (deep power-down mode and float. Address then becomes the lowest order address. 1 16M (1M × 16, 2M × 8) Flash Memory selects between the high and low 0 input buffer ...
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... The LH28F016LL incorporates two Page Buffers of 256 Bytes (128 Words) each to allow page data writes. This feature can improve a system write performance 4.8 times over previous flash memory devices. All operations are started by a sequence of Write commands to the device. Three Status Registers (de- scribed in detail later) and a RY information on the progress of the requested operation ...
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... BSR registers are cleared. A CMOS Standby mode of operation is enabled when either CE » with all input control pins at CMOS levels. In this mode, the device typically draws µA. 16M (1M × 16, 2M × 8) Flash Memory 64KB BLOCK 31 64KB BLOCK 30 64KB BLOCK 29 64KB BLOCK 28 ...
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... Flash Memory Extended Status Registers Memory Map x8 MODE A[20:0] 1F0006H RESERVED 1F0005H GSR 1F0004H RESERVED 1F0003H BSR31 1F0002H RESERVED 1F0001H RESERVED 1F0000H . . . 010002H RESERVED 000006H RESERVED 000005H GSR 000004H RESERVED 000003H BSR0 000002H RESERVED 000001H RESERVED 000000H Figure 4 ...
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... » » , which is either V OL » » through a resistor. When the until all operations are complete 16M (1M × 16, 2M × 8) Flash Memory » » NOTE OUT High High High 00B0H 6688H » » ...
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... Flash Memory LH28F008SA-Compatible Mode Command Bus Definitions COMMAND Read Array Intelligent Identifier Read Compatible Status Register Clear Status Register Word/Byte Write Alternate Word/Byte Write Block Erase/Confirm Erase Suspend/Resume ADDRESS DATA AA = Array Address AD = Array Data BA = Block Address CSRD = CSR Data ...
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... Write X D0H X 96H Write X 01H X 96H Write X 02H X 96H Write X 03H X 96H Write X 04H X F0H X 80H 16M (1M × 16, 2M × 8) Flash Memory THIRD BUS CYCLE NOTE OPER. ADDR. DATA 1 7 Write X BCH Write X WCH Write Write WA WCH Write WA WD (H, L) ...
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... These commands reconfigure Write address, WA, is the Destination address in the flash array which must match the Source address in the Page Buffer. Refer to the LH28F016SU User’s Manual. 10. BCL = 00H corresponds to a Byte count of 1. Similarly, WCL = 00H corresponds to a Word count of 1. ...
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... Selected Page Buffer is currently busy with WSM operation. 7. When multiple operations are queued, checking BSR.7 only provides indication of completion for that particular block. GSR.7 provides indication when all queued opera- tions are completed. 16M (1M × 16, 2M × 8) Flash Memory PBAS PBS PBSS 2 ...
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... Flash Memory BLOCK STATUS REGISTER BS BLS BOS 7 6 BSR.7 = 1BLOCK STATUS (BS Ready 0 = Busy BSR.6 = BLOCK-LOCK STATUS (BLS Block Unlocked for Write/Erase 0 = Block Locked for Write/Erase BSR.5 = BLOCK OPERATION STATUS (BOS Operation Unsuccessful 0 = Operation Successful or Currently Running BSR.4 = BLOCK OPERATION ABORT STATUS (BOAS) ...
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... 0.5 CC ±30 100.0 + 0.5 V which, during transitions, may overshoot TYP. MAX. UNITS 2.5 ns 16M (1M × 16, 2M × 8) Flash Memory TEST CONDITIONS NOTE °C Ambient Temperature 2.0 V for periods < 20 ns. CC TEST CONDITIONS NOTE T = 25° 1.0 MHz 25° 1.0 MHz ...
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... Flash Memory Timing Nomenclature All 3.3 V system timings are measured from where signals cross 1.5 V. For 5.0 V systems use the standard JEDEC cross point definitions. Each timing parameter consists of 5 characters. Some common examples are defined below: ...
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... CMOS: CE BYTE = V Inputs = GND ±0 TTL: CE BYTE = V Inputs = MHz Word/Byte Write in Progress Block Erase in Progress Block Erase Suspended 0.2 5 µ 0.2 5 µA RP 16M (1M × 16, 2M × 8) Flash Memory TEST CONDITIONS NOTE = V MAX GND MAX GND MAX., CC » » » ±0 » ± ...
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... Flash Memory DC Characteristics (Continued 3.3 V ± 0 0°C to +70°C CC SYMBOL PARAMETER I V Read Current PPR Write Current PPW Erase Current PPE PP V Erase Suspend PP I PPES Current V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage ...
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... This timing parameter is used to latch the correct BSR data onto the outputs 3.3 V ± 0 UNITS MIN. MAX. 100 10 0 100 100 620 » 120 30 5 » after the falling edge of CE without impact on t 16M (1M × 16, 2M × 8) Flash Memory NOTE ...
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... Flash Memory V CC POWER-UP STANDBY V IH ADDRESSES ( ( (NOTE ( ( HIGH-Z OH DATA (D/ 5 GND ( NOTE defined as the latter DEVICE AND ADDRESS SELECTION OUTPUTS ENABLED ADDRESSES STABLE t AVAV t AVEL t AVGL t GLQV t ELQV t GLQX t ELQX t AVQV t PHQV or CE going LOW or the first of CE ...
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... ELFL t AVGL t FLQV t GLQV t ELQV t GLQX t ELQX t AVQV or CE going LOW or the first » » Figure 10 Timing Waveforms 16M (1M × 16, 2M × 8) Flash Memory . . . . . . . . . t EHQZ . . . t GHQZ = t AVQV . . . HIGH-Z DATA DATA OUTPUT . . . OUTPUT t FLQZ HIGH-Z DATA OUTPUT going HIGH. ...
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... Flash Memory V POWER (P) 3 ADDRESS (A) DATA (Q) Figure 11. V SYMBOL » Low 3.0 V Minimum Address Valid to Data Valid for V AVQV » High to Data Valid for V PHQV NOTES: » » » and OE are switched low after Power-Up. ...
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... Sampled, but not 100% tested. 4. Write/Erase durations are measured to valid Status Register (CSR) Data. 5. Word/Byte write operations are typically performed with 1 Programming Pulse. 6. Address and Data are latched on the rising edge of CE **To be Determined 22 16M (1M × 16, 2M × 8) Flash Memory TYP. MIN. MAX. 100 100 ...
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... Flash Memory WRITE DATA-WRITE OR ERASE DEEP SETUP COMMAND POWER-DOWN V ADDRESSES (A) IH (NOTE AVAV V ADDRESSES (A) IH (NOTE AVAV CE ( (NOTE WHEH t ELWL ( ( WLWH DATA (D/Q) V HIGH PHWL V OH RY/ PPH V ( PPL NOTES: 1. This address string depicts Data-Write/Erase cycles with corresponding verification via ESRD. ...
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... BY High » Going Low » » High ** ** ** » » going High » for all Command Write Operations. 16M (1M × 16, 2M × 8) Flash Memory 1 MAX. UNITS NOTE 100 µs ns µs µ ...
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... Flash Memory WRITE DATA-WRITE OR ERASE DEEP SETUP COMMAND POWER-DOWN V ADDRESSES (A) IH (NOTE AVAV V ADDRESSES (A) IH (NOTE AVAV ( EHWH t WLEL ( ( (NOTE ELEH DATA (D/Q) V HIGH PHEL V OH RY/ PPH V ( PPL NOTES: 1. This address string depicts Data-Write/Erase cycles with corresponding verification via ESRD. ...
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... Sampled, but not 100% tested. 3. Address must be valid during the entire TYP. MIN. MAX. 120 » » going High » controlled write timings apply. » Low pulse. 16M (1M × 16, 2M × 8) Flash Memory UNITS NOTE ...
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... Flash Memory CE ( ELWL WE (W) t ADDRESSES HIGH-Z DATA (D/Q) Figure 14. Page Buffer Write Timing Waveforms Erase and Word/Byte Write Performance V = 3.3 V ± 0 0°C to +70° SYMBOL PARAMETER 1 t Word/Byte Write Time WHRH 2 t Block Write Time WHRH ...
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... MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH28F016LL T -## Device Type Package Speed Example: LH28F016LLT-12 (16M ( Flash Memory, 120 ns, 56-pin TSOP 0.13 [0.005] 20.30 [0.799] 19.70 [0.776] 18.60 [0.732] 18.20 [0.717] 19.30 [0.760] 18.70 [0.736] 12 120 15 150 Access Time (ns) 56-pin, 1 ...
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... Camas, WA 98607, U.S.A. Phone: (360) 834-2500 Telex: 49608472 (SHARPCAM) Facsimile: (360) 834-8903 http://www.sharpmeg.com ©1997 by SHARP Corporation Issued May 1996 EUROPE SHARP Electronics (Europe) GmbH Microelectronics Division Sonninstraße 3 20097 Hamburg, Germany Phone: (49) 40 2376-2286 Telex: 2161867 (HEEG D) Facsimile: (49) 40 2376-2232 LH28F016LL ...