LH28F640BFE-PBTL90 Sharp Electronics, LH28F640BFE-PBTL90 Datasheet
LH28F640BFE-PBTL90
Specifications of LH28F640BFE-PBTL90
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LH28F640BFE-PBTL90 Summary of contents
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... P P RELIMINARY RODUCT LH28F640BFE-PBTL90 S PECIFICATIONS ® Flash Memory 64M (4M × 16) (Model No.: LHF64F11) Issue Date: August 29, 2001 Integrated Circuits Group ...
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Handle this document carefully for it contains material protected by international copyright law. Any reproduction, full or in part, of this material is prohibited without the express written permission of the company. • When using the products covered ...
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TSOP Pinout................................................. 3 Pin Descriptions.......................................................... 4 Simultaneous Operation Modes Allowed with Four Planes .................................. 5 Memory Map .............................................................. 6 Identifier Codes and OTP Address for Read Operation ............................................. 7 Identifier Codes and OTP Address for Read Operation on ...
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... Fast program capability is provided through the use of high speed Page Buffer Program. Special OTP (One Time Program) block provides an area to store permanent code such as a unique number. * ETOX is a trademark of Intel Corporation. LHF64F11 LH28F640BFE-PBTL90 64Mbit (4Mbit×16) Flexible Blocking Architecture • Eight 4K-word Parameter Blocks • ...
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WE# 11 RST WP# 14 ...
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... Use of this pin at 12V beyond these limits may reduce block cycling capability or cause permanent damage. DEVICE POWER SUPPLY (2.7V-3.6V): With V V SUPPLY flash memory are inhibited. Device operations at invalid V CC Characteristics) produce spurious results and should not be attempted. INPUT/OUTPUT POWER SUPPLY (2.7V-3.6V): Power supply for all input/output V ...
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Table 2. Simultaneous Operation Modes Allowed with Four Planes THEN THE MODES ALLOWED IN THE OTHER PARTITION IS: IF ONE Read Read PARTITION IS: Array ID/OTP Read Array X X Read ID/OTP X X Read Status X X Read ...
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BLOCK NUMBER ADDRESS RANGE 134 32K-WORD 133 32K-WORD 132 32K-WORD 131 32K-WORD 130 32K-WORD 129 32K-WORD 128 32K-WORD 127 32K-WORD 126 32K-WORD 125 32K-WORD 124 32K-WORD 123 32K-WORD 122 32K-WORD 121 32K-WORD 120 32K-WORD 119 32K-WORD 118 32K-WORD 117 ...
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Table 3. Identifier Codes and OTP Address for Read Operation Manufacturer Code Manufacturer Code Device Code Bottom Parameter Device Code Block Lock Configuration Block is Unlocked Code Block is Locked Block is not Locked-Down Block is Locked-Down Device Configuration ...
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Customer Programmable Area Lock Bit (DQ Factory Programmed Area Lock Bit (DQ Figure 3. OTP Block Address Map for OTP Program LHF64F11 - Customer Programmable Area Factory Programmed Area Reserved ...
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Table 5. Bus Operation Mode Notes RST# Read Array Output Disable V IH Standby V IH Reset Read Identifier Codes/OTP V Read Query 6,7 IH Write 4,5 NOTES: ...
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... OTP block (See Table 3 and Table 4). The Read Query command is available for reading CFI (Common Flash Interface) information. 5. Block erase, full chip erase or (page buffer) program cannot be executed when the selected block is locked. Unlocked block can be erased or programmed when RST ...
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LH28F640BF series for details the program operation in one partition is suspended and the erase operation in other partition is also suspended, the suspended program operation should be resumed first, and then the suspended erase operation should ...
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Table 7. Functions of Block Lock State WP# [000 (3) [001] [011] 0 [100 (3) [101] 1 (4) [110] [111] 1 NOTES =1: a block is locked =1: a block ...
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Table 9. Block Locking State Transitions upon WP# Transition Previous State State - [000] - [001] (2) [110] [011] (2) Other than [110] - [100] - [101] - [110] - [111] NOTES: 1. "WP#=0→1" means that WP# is driven ...
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WSMS BESS BEFCES 7 6 SR.15 - SR.8 = RESERVED FOR FUTURE ENHANCEMENTS (R) SR.7 = WRITE STATE MACHINE STATUS (WSMS Ready 0 = Busy SR.6 = BLOCK ERASE SUSPEND STATUS (BESS) 1 ...
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SMS XSR.15-8 = RESERVED FOR FUTURE ENHANCEMENTS (R) XSR.7 = STATE MACHINE STATUS (SMS Page Buffer Program available 0 = Page Buffer Program not available XSR.6-0 = RESERVED FOR FUTURE ...
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Table 12. Partition Configuration Register Definition PCR.15-11 = RESERVED FOR FUTURE ENHANCEMENTS (R) PCR.10-8 = PARTITION CONFIGURATION (PC2-0) 000 = No partitioning. Dual Work is not allowed. 001 = Plane1-3 are ...
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Electrical Specifications 1.1 Absolute Maximum Ratings Operating Temperature During Read, Erase and Program ...... 0°C to +70°C Storage Temperature During under Bias............................... -10°C to +80°C During non Bias................................ -65°C to +125°C Voltage On Any Pin (except V and ...
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Capacitance (1) (T =+25°C, f=1MHz) A Parameter Symbol Input Capacitance C Output Capacitance C OUT NOTE: 1. Sampled, not 100% tested. 1.2.2 AC Input/Output Test Conditions V CCQ INPUT 0.0 AC test inputs are driven at V Input ...
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DC Characteristics Symbol Parameter I Input Load Current LI I Output Leakage Current Standby Current CCS Automatic Power Savings Current CCAS Reset Power-Down Current CCD CC Average V Read ...
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Symbol Parameter I V Block Erase Suspend Current PPES PP V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage OH V Lockout during Normal PP V PPLK Operations V ...
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AC Characteristics - Read-Only Operations Symbol t Read Cycle Time AVAV t Address to Output Delay AVQV t CE# to Output Delay ELQV t Page Address Access Time APA t OE# to Output Delay GLQV t RST# High ...
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(A) (A) 21-0 20 CE# ( OE# ( (W) WE High (D/Q) 15 ...
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(A) (A) 21-3 20 (A) 2 (E) CE OE# ( (W) WE High Z OH ...
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AC Characteristics - Write Operations Symbol t Write Cycle Time AVAV RST# High Recovery to WE# (CE#) Going Low PHWL PHEL CE# (WE#) Setup to WE# (CE#) Going Low ELWL WLEL t ...
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NOTE 1 NOTE VALID A A (A) (A) 21-0 20-0 ADDRESS (E) CE ELWL WLEL V IH OE# ( PHWL PHEL V IH ...
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Reset Operations V IH RST# ( High (D/Q) 15 RST# ( High (D/Q) 15 (min GND ...
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Block Erase, Full Chip Erase, (Page Buffer) Program and OTP Program Performance Symbol Parameter 4K-Word Parameter Block t WPB Program Time 32K-Word Main Block t WMB Program Time t / WHQV1 Word Program Time t EHQV1 t / ...
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Related Document Information Document No. FUM00701 NOTE: 1. International customers should contact their local SHARP or distribution sales offices. LHF64F11 (1) Document Name LH28F640BF series Appendix 28 Rev. 2.41 ...
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A-1 RECOMMENDED OPERATING CONDITIONS A-1.1 At Device Power-Up AC timing illustrated in Figure A-1 is recommended for the supply voltages and the control signals at device power-up. If the timing in the figure is ignored, the device may not ...
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A-1.1.1 Rise and Fall Time Symbol t V Rise Time Input Signal Rise Time R t Input Signal Fall Time F NOTES: 1. Sampled, not 100% tested. 2. This specification is applied for not only the ...
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A-1.2 Glitch Noises Do not input the glitch noises which are below V as shown in Figure A-2 (b). The acceptable glitch noises are illustrated in Figure A-2 (a). Input Signal V (Min (Max.) IL Input Signal ...
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... A-2 RELATED DOCUMENT INFORMATION Document No. AP-001-SD-E AP-006-PT-E AP-007-SW-E NOTE: 1. International customers should contact their local SHARP or distribution sales office. (1) Document Name Flash Memory Family Software Drivers Data Protection Method of SHARP Flash Memory RP#, V Electric Potential Switching Circuit PP iv Rev. 1.10 ...
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... Head Office: No. 360, Bashen Road, Xin Development Bldg. 22 Waigaoqiao Free Trade Zone Shanghai 200131 P.R. China Email: smc@china.global.sharp.co.jp EUROPE SHARP Microelectronics Europe Division of Sharp Electronics (Europe) GmbH Sonninstrasse 3 20097 Hamburg, Germany Phone: (49) 40-2376-2286 Fax: (49) 40-2376-2232 www.sharpsme.com SINGAPORE SHARP Electronics (Singapore) PTE., Ltd. ...