AD9830AST Analog Devices Inc, AD9830AST Datasheet
AD9830AST
Specifications of AD9830AST
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AD9830AST Summary of contents
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FEATURES +5 V Power Supply 50 MHz Speed On-Chip SINE Look-Up Table On-Chip 10-Bit DAC Parallel Loading Power-Down Option 72 dB SFDR 250 mW Power Consumption 48-Pin TQFP APPLICATIONS DDS Tuning Digital Demodulation MCLK FSELECT FREQ0 REG FREQ1 REG ...
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AD9830–SPECIFICATIONS Parameter SIGNAL DAC SPECIFICATIONS Resolution Update Rate (f ) MAX I Full Scale OUT Output Compliance DC Accuracy Integral Nonlinearity Differential Nonlinearity 2 DDS SPECIFICATIONS Dynamic Specifications Signal-to-Noise Ratio Total Harmonic Distortion Spurious Free Dynamic Range (SFDR) Narrow Band ...
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TIMING CHARACTERISTICS Limit MIN MAX Parameter (A Version ...
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... Although this device features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Model Temperature Range AD9830AST – +85 C *ST = Thin Quad Flatpack (TQFP). Maximum Junction Temperature . . . . . . . . . . . . . . . . +150 C TQFP Thermal Impedance . . . . . . . . . . . . . . . . . 75 C/W ...
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Mnemonic Function POWER SUPPLY AVDD Positive power supply for the analog section. A 0.1 F capacitor should be connected between AVDD and AGND. AVDD has a value AGND Analog Ground. DVDD Positive power supply for the digital ...
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AD9830 TERMINOLOGY Integral Nonlinearity This is the maximum deviation of any code from a straight line passing through the endpoints of the transfer function. The endpoints of the transfer function are zero scale, a point 0.5 LSB below the first ...
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AVDD = DVDD = + + 200kHz OUT MCLK FREQUENCY – MHz Figure 5. Typical Current Consumption vs. MCLK Frequency –50 AVDD = DVDD ...
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AD9830 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 START 0Hz RBW 1kHz VBW 3kHz Figure 11 MHz 2.1 MHz, Frequency MCLK OUT Word = ACO8312 0 –10 –20 –30 –40 –50 –60 ...
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Figure 17. f Word = 547AE148 Register Size Description FREQ0 REG 32 Bits Frequency Register 0. This defines the output frequency, when FSELECT = fraction of the MCLK frequency. FREQ1 REG 32 Bits Frequency Register 1. This ...
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AD9830 CIRCUIT DESCRIPTION The AD9830 provides an exciting new level of integration for the RF/Communications system designer. The AD9830 combines the Numerical Controlled Oscillator (NCO), SINE Look-Up table, Frequency and Phase Modulators, and a Digital-to-Analog Converter on a single integrated ...
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Since full-scale current is controlled by R adjustments to R can balance changes made to the load resistor. SET However, if the DAC full-scale output current is significantly ...
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AD9830 APPLICATIONS The AD9830 contains functions which make it suitable for modulation applications. The part can be used to perform simple modulation such as FSK. More complex modulation schemes such as GMSK and QPSK can also be implemented using the ...
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Grounding and Layout The printed circuit board that houses the AD9830 should be designed so that the analog and digital sections are separated and confined to certain areas of the board. This facilitates the use of ground planes which can ...
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AD9830 1 LATCH INTERFACE RESET 8 D6 LATCH 9 D7 LOAD RESET ...
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REV. A OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 48-Lead TQFP (ST-48) 0.063 (1.60) MAX 0.354 (9.00) BSC 0.030 (0.75) 0.057 (1.45) 0.276 (7.0) BSC 0.030 (0.75) 0.053 (1.35) 0.018 (0.45) 0.018 (0.45 SEATING PLANE TOP VIEW ...
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