CY62167DV30L-70BVI Cypress Semiconductor Corp, CY62167DV30L-70BVI Datasheet
CY62167DV30L-70BVI
Specifications of CY62167DV30L-70BVI
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CY62167DV30L-70BVI Summary of contents
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... Power-down Note: 1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05328 Rev. *E 16-Mbit (1M x 16) Static RAM reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE HIGH) ...
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... DNU pins have to be left floating. 4. The BYTE pin in the 48-TSOPI package has to be tied HIGH to use the device × 16 SRAM. The 48-TSOPI package can also be used × 8 SRAM by tying the BYTE signal LOW. For 2M × 8 Functionality, please refer to the CY62168DV30 datasheet. In the 2M × 8 configuration, Pin 45 is A20. ...
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... Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V Document #: 38-05328 Rev. *E Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage.......................................... > 2001V (per MIL-STD-883, Method 3015) Latch-up Current..................................................... > 200 mA Operating Range + 0.3V Device CC CY62167DV30L + 0.3V CC CY62167DV30LL + 0. 1MHz Speed [9] [9] Max. (ns) Typ. 3. ...
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Capacitance [10, 11] Parameter Description C Input Capacitance IN C Output Capacitance OUT Thermal Resistance Parameter Description Θ Thermal Resistance JA (Junction to Ambient) Θ Thermal Resistance JC [10] (Junction to Case) AC Test Loads and Waveforms ...
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Switching Characteristics Over the Operating Range Parameter Description Read Cycle t Read Cycle Time RC t Address to Data Valid AA t Data Hold from Address Change OHA t CE LOW and CE ACE LOW to Data ...
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Switching Waveforms Read Cycle 1 (Address Transition Controlled) ADDRESS DATA OUT PREVIOUS DATA VALID [19, 20] Read Cycle 2 (OE Controlled) ADDRESS BHE/BLE t LZBE OE HIGH IMPEDANCE DATA OUT t LZCE ...
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Switching Waveforms (continued) [17, 21, 22, 23] Write Cycle 1 (WE Controlled) ADDRESS BHE/BLE OE DATA I/O See Note 23 t HZOE Notes: 20. Address valid prior to or coincident with CE 1 ...
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Switching Waveforms (continued) Write Cycle 2 ( Controlled ADDRESS BHE/BLE OE DATA I/O See Note 23 t HZOE Write Cycle 3 (WE Controlled, OE LOW) ADDRESS ...
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Switching Waveforms (continued) Write Cycle 4 (BHE/BLE Controlled, OE LOW) ADDRESS BHE/BLE DATA I/O See Note 23 Truth Table BHE ...
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... Ordering Information Speed (ns) Ordering Code 55 CY62167DV30L-55BVI CY62167DV30LL-55BVI 55 CY62167DV30L-55ZI CY62167DV30LL-55ZI 70 CY62167DV30L-70BVI CY62167DV30LL-70BVI 70 CY62167DV30L-70ZI CY62167DV30LL-70ZI Package Diagrams TOP VIEW A1 CORNER 8.00±0.10 SEATING PLANE C Document #: 38-05328 Rev. *E Package Name Package Type BV48B 48-ball Fine Pitch BGA (8 mm × 9.5mm × 1 mm) Z48A 48 Pin TSOP I BV48B 48-ball Fine Pitch BGA (8 mm × ...
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... Document #: 38-05328 Rev. *E © Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...
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Document History Page Document Title:CY62167DV30 MoBL Document Number: 38-05328 REV. ECN NO. Issue Date ** 118408 09/30/02 *A 123692 02/11/03 *B 126555 04/25/03 *C 127841 09/10/03 *D 205701 *E 238050 See ECN Document #: 38-05328 Rev. *E 16-Mbit (1M ...