CYNSE70064A-83BGC Cypress Semiconductor Corp, CYNSE70064A-83BGC Datasheet - Page 77

• Manufacturer Part Number: CYNSE70064A-83BGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70064A-83BGC

• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 1.9V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

each entry in the table starting at location 0. The first matching entry’s location address L is the winning address that is driven as
part of the SRAM address on the SADR[21:0] lines (See “SRAM Addressing” on page 101.). Note. The matching address is
always going to be a location 0 in a four-entry page for 272-bit Search (two LSBs of the matching index will be 00).
The Search command is a pipelined operation and executes Search at one fourth the rate of the frequency of CLK2X for 272-bit
searches in x272-configured tables. The latency of SADR, CE_L, ALE_L, WE_L, SSV, and SSF from the 272-bit Search command
(measured in CLK cycles) from the CLK2X cycle that contains the C and D cycles is shown in Table 10-29.
Table 10-29. The Latency of Search from C and D cycles to SRAM Access Cycle
The latency of Search from command to SRAM access cycle is 5 for only a single device in the table and TLSZ = 01. In addition,
SSV and SSF shift further to the right for different values of HLAT, as specified in Table 10-30.
Table 10-30. Shift of SSF and SSV from SADR
10.14
The hardware diagram of the Search subsystem of 31 devices is shown in Figure 10-57. Each of the four blocks in the diagram
represents a block of eight CYNSE70064A devices, except the last which has seven devices. The diagram for a block of eight
devices is shown in Figure 10-58. The following are the parameters programmed into the 31 devices.
Note. All 31 devices must be programmed with the same value of TLSZ and HLAT. Only the last device in the table must be
programmed with LRAM = 1 and LDEV = 1 (device number 30 in this case). All other upstream devices must be programmed
with LRAM = 0 and LDEV = 0 (devices 0 through 29 in this case).
Document #: 38-02041 Rev. *F
• First thirty devices (devices 0–29): CFG = 10101010, TLSZ = 10, HLAT = 000, LRAM = 0, and LDEV = 0.
• Thirty-first device (device 30): CFG = 10101010, TLSZ = 10, HLAT = 000, LRAM = 1, and LDEV = 1.
Number of Devices
1–31 (TLSZ = 10)
1–8 (TLSZ = 01)
1 (TLSZ = 00)
272-bit Search on Tables Configured as ×272 Using up to 31 CYNSE70064A Devices
HLAT
000
001
010
100
101
011
110
111
Location
address
262140
GMR
12
L
0
4
8
K
271
271
0
Figure 10-56. ×272 Table with Eight Devices
CFG = 10101010
A
Max Table Size
248K × 272 bits
64K × 272 bits
8K × 272 bits
1
B
(272-bit configuration)
2
C
Number of CLK Cycles
3
D
0
1
2
3
4
5
6
7
0
0
Latency in CLK Cycles
Must be same in each of the eight
(First matching entry)
4
5
6
devices
CYNSE70064A
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