ADP3404ARU-REEL Analog Devices Inc, ADP3404ARU-REEL Datasheet - Page 11

• Manufacturer Part Number: ADP3404ARU-REEL
• Manufacturer: Analog Devices Inc

Specifications of ADP3404ARU-REEL

• Battery Type: Li-Ion/NiMH
• Output Current: 175uA
• Output Voltage: 2.45V
• Operating Temp Range: -20C to 85C
• Package Type: TSSOP
• Mounting: Surface Mount
• Pin Count: 28
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

Undervoltage Lockout (UVLO)
The UVLO function in the ADP3404 prevents startup when the
initial voltage of the main battery is below the 3.2 V threshold.
If the battery is this low with no load, there will be little or no
capacity left. When the battery is greater than 3.2 V, as with the
insertion of a fresh battery, the UVLO comparator trips, the
RTC LDO is enabled, and the threshold is reduced to 3.0 V.
This allows the handset to start normally until the battery volt-
age decays to 3.0 V open circuit. Once the 3.2 V threshold is
exceeded, the RTC LDO is enabled. If, however, if the backup
coin cell is not connected, or is damaged or discharged below
1.5 V, the RTC LDO will not start on its own. In this situation,
the RTC LDO will be started by enabling the VCC LDO.
Once the system is started, i.e., the phone is turned on and the
VCC LDO is up and running, the UVLO function is entirely
disabled. The ADP3404 is then allowed to run down to very low
battery voltages, typically around 2 V. The battery voltage is
normally monitored by the microprocessor and usually shuts the
phone off at around 3.0 V.
If the phone is off, i.e., the VCC LDO is off, and the battery
voltage drops below 3.0 V, the UVLO circuit disables startup
and the RTC LDO. This is implemented with very low quies-
cent current, typically 3 µA, to protect the main battery against
any damage. NiMH batteries can reverse polarity if the 3-cell
battery voltage drops below 3.0 V and a current of more than
about 40 µA continues to flow. Lithium ion batteries will lose
their capacity, although the built-in safety circuits normally
present in these cells will most likely prevent any damage.
RESET
ADP3404 contains reset circuitry that is active both at power-up
and at power-down. RESET is held low at power-up. An inter-
nal power-good signal starts the reset delay. The delay is set by
an external capacitor on RESCAP:
A 100 nF capacitor will produce a 100 ms reset time. At power-off,
RESET will be kept low to prevent any spurious microprocessor
starts. The current capability of RESET is low (a few hundred
nA) when VCC is off, to minimize power consumption. There-
fore, RESET should only be used to drive a single CMOS input.
When VCC is on, RESET will drive about 15 µA.
Overtemperature Protection
The maximum die temperature for ADP3404 is 125
temperature exceeds 160
except the RTC LDO, which has very limited current capabilities.
The LDOs will not be re-enabled before the die temperature is
below 125
and CHRON. This ensures that the handset will always power-off
before the ADP3404 exceeds its absolute maximum thermal ratings.
APPLICATIONS INFORMATION
Input Capacitor Selection
For the input voltage, VBAT, of the ADP3404, a local bypass
capacitor is recommended. Use a 5 µF to 10 µF, low ESR capaci-
tor. Multilayer ceramic chip capacitors provide the best combina-
tion of low ESR and small size, but may not be cost effective. A
lower cost alternative may be to use a 5 µF to 10 µF tantalum
capacitor with a small (1 µF to 2 µF) ceramic in parallel.
°
C, regardless of the state of PWRONKEY, PWRONIN,
t
RESET
°
=
C, the ADP3404 will disable all the LDOs
1 0 . ms/nF
×
C
RESCAP
°
C. If the die
LDO Capacitor Selection
The performance of any LDO is a function of the output capaci-
tor. The digital and analog LDOs require a 2.2 µF capacitor and
the TCXO LDO requires a 0.22 µF capacitor. Larger values
may be used, but the overshoot at startup will increase slightly.
If a larger output capacitor is desired, be sure to check that the
overshoot and settling time are acceptable for the application.
All the LDOs are stable with a wide range of capacitor types and
ESR due to Analog Devices’ anyCAP technology. The ADP3404
is stable with extremely low ESR capacitors (ESR ~ 0), such as
multilayer ceramic capacitors, but care should be taken in their
selection. Note that the capacitance of some capacitor types show
wide variations over temperature or with dc voltage. A good quality
dielectric, X7R or better, is recommended.
The RTC LDO has a rechargeable coin cell or an electric double-
layer capacitor as a load, but a 0.1 µF ceramic capacitor is recom-
mended for stability and best performance.
Charge Pump Capacitor Selection
For the input (SIMBAT) and output (VSIM) of the SIM charge
pump, use 10 µF low ESR capacitors. The use of low ESR capaci-
tors improves the noise and efficiency of the SIM charge pump.
Multilayer ceramic chip capacitors provide the best combination of
low ESR and small size but may not be cost effective. A lower cost
alternative may be to use a 10 µF tantalum capacitor with a small
(1 µF to 2 µF) ceramic capacitor in parallel.
For the lowest ripple and best efficiency, use a 0.1 µF, ceramic
capacitor for the charge pump flying capacitor (CAP+ and CAP–).
A good quality dielectric, such as X7R is recommended.
Setting the Charger Turn-On Threshold
The ADP3404 can be turned on when the charger input exceeds
a programmable threshold voltage. The charger’s threshold and
hysteresis are set by selecting the values for R1 and R2 shown in
Figure 2.
The turn-on threshold for the charger is calculated using:
Where V
CHRON hysteresis resistance.
The hysteresis is determined using:
Combining the above equations and solving for R1 and R2 gives
the following formulas:
Example: R1 = 10 kΩ and R2 = 30.2 kΩ gives a charger thresh-
old (not counting the drop in the power Schottky diode) of
3.5 V ± 160 mV with a 200 mV ± 30 mV hysteresis.
T
is the CHRON threshold voltage and R
V
CHR
R
2
=
=




V



R



V
R
R
HYS
1 =
V
CHR
2
2
T
+
×
R
=
R
R
V
R
HYS
−
R
HYS
HYS
T
1
V
1
HYS
×

 ×

T
R
×
×
V
HYS
R
× 1
R
HYS
HYS
R
1

 +

−
1
R




ADP3404
1
×
V
T
HYS
is the