W162-19G Cypress Semiconductor Corp, W162-19G Datasheet
W162-19G
Specifications of W162-19G
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W162-19G Summary of contents
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... QA1 QA0 VDD QA1 GND QA2 QB0 QB1 QA3 SEL1 QB0 QB1 QB2 QB3 • 3901 North First Street • San Jose W162 QA0:3 QB0:3 PLL QFB Three- Three- Shutdown Active State State Active Three- Active, Active State Utilized Active Active ...
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... GND SEL0 Overview The W162 products are nine-output zero delay buffers. A Phase-Locked Loop (PLL) is used to take a time-varying signal and provide eight copies of that same signal out. Internal feedback is used to maximize the number of output signals provided in the 16-pin package. Spread Aware Many systems being designed now utilize a technology called Spread Spectrum Frequency Timing Generation ...
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... Measured All outputs loaded equally [5] 15-pF load 45 Power supply stable transmission line, load terminated with 50 to 1.4V. W162 Rating Unit –0.5 to +7.0 V –65 to +150 ° +70 °C –55 to +125 °C 0.5 W ...
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... Output Output 4 13 Power Power 5 12 Ground Ground 6 11 Output Output 7 10 Output Output 8 9 Logic In Logic In Package Name Package Type G 16-pin Plastic SOIC (150-mil) H 16-pin Plastic SSOP (150-mil) W162 Ferrite Bead GND (for desired operation mode) DD Page [+] Feedback ...
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... Package Diagrams 16-pin SSOP Small Shrunk Outline Package (SSOP, 150-mil) Document #: 38-07150 Rev. *A W162 Page [+] Feedback ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. W162 Page ...
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... Document Title: W162 Spread Aware™. Zero Delay Buffer Document Number: 38-07150 Issue Orig. of REV. ECN NO. Date Change ** 110590 12/19/01 DSG *A 122799 12/14/02 Document #: 38-07150 Rev. *A Description of Change Change from Spec number: 38-00788 to 38-07150 RBI Add Power up Requirements to Operating Conditions Information ...