CY7C68300A-56LFXC Cypress Semiconductor Corp, CY7C68300A-56LFXC Datasheet - Page 2

• Manufacturer Part Number: CY7C68300A-56LFXC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C68300A-56LFXC

• Lead Free Status / Rohs Status: Compliant

and receives status and data from the CY7C68300A using
standard USB protocol.
The ATA/ATAPI port of the CY7C68300A is connected to a
mass storage device. A 4-Kbyte buffer maximizes ATA/ATAPI
data transfer rates by minimizing losses due to device seek
3.0
3.1
Document #: 38-08031 Rev. *E
Pin Diagram
Pin Assignments
Use CY7C68300B EZ-USB AT2LP™ USB2.0 to ATA/ATAPI
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
This part is not recommended for new designs
DD13
DD14
NC
Vcc
DMARQ
AVcc
DPLUS
DMINUS
GND
Vcc
RESERVED
SCL
DD0
DD1
DD15
GND
GND
IORDY
XTALOUT
XTALIN
AGND
Vcc
GND
PU10K
SDA
Vcc
DD2
DD3
Figure 3-1. 56-pin SSOP
CY7C68300A
56-pin SSOP
EZ-USB AT2
Bridge for new designs
times. The ATA interface supports ATA PIO modes 0, 3, and 4,
and Ultra DMA modes 2 and 4.
The device initialization process is configurable, enabling the
CY7C68300A to initialize ATA/ATAPI devices without software
intervention.
VBUS_PWR_VALID
ARESET#
DMACK#
ATA_EN
RESET#
DIOW#
INTRQ
DIOR#
DD12
DD11
DD10
CS1#
CS0#
GND
GND
GND
DD9
DD8
DA2
DD7
DD6
DD5
DD4
DA1
DA0
Vcc
Vcc
Vcc
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
34
33
32
31
30
29
56
55
35
CY7C68300A
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