MC74HC245ADW ON Semiconductor, MC74HC245ADW Datasheet - Page 2

Bus Transceivers 2-6V Octal 3-State

MC74HC245ADW

Manufacturer Part Number
MC74HC245ADW
Description
Bus Transceivers 2-6V Octal 3-State
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC74HC245ADW

Logic Type
CMOS
Logic Family
74HC
Number Of Channels Per Chip
8
Input Level
CMOS
Output Level
CMOS
Output Type
3-State
High Level Output Current
- 7.8 mA
Low Level Output Current
7.8 mA
Propagation Delay Time
75 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Package / Case
SOIC-20 Wide
Function
Bus Transceiver
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 55 C
Mounting Style
SMD/SMT
Number Of Circuits
8
Polarity
Non-Inverting
Lead Free Status / Rohs Status
No RoHS Version Available

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC74HC245ADWR2G
Manufacturer:
ON Semiconductor
Quantity:
1 300
Part Number:
MC74HC245ADWR2G
Manufacturer:
ON/安森美
Quantity:
20 000
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
*This package is inherently Pb−Free.
DIRECTION
ORDERING INFORMATION
Specifications Brochure, BRD8011/D.
MC74HC245AN
MC74HC245ANG
MC74HC245ADW
MC74HC245ADWG
MC74HC245ADWR2
MC74HC245ADWR2G
MC74HC245ADT
MC74HC245ADTG
MC74HC245ADTR2
MC74HC245ADTR2G
MC74HC245AF
MC74HC245AFG
MC74HC245AFEL
MC74HC245AFELG
GND
A5
A1
A2
A3
A4
A6
A7
A8
Figure 1. Pin Assignment
1
2
3
4
5
6
7
8
9
10
Device
X = don’t care
20
19
18
17
16
15
14
13
12
11
Output
Enable
H
Control Inputs
L
L
V
OUTPUT ENABLE
B1
B2
B3
B4
B5
B6
B7
B8
CC
Direction
H
L
X
OUTPUT ENABLE
FUNCTION TABLE
http://onsemi.com
Data Transmitted from Bus B to Bus A
Data Transmitted from Bus A to Bus B
Buses Isolated (High−Impedance State)
MC74HC245A
DIRECTION
PORT
SOIC−20 WIDE
SOIC−20 WIDE
SOIC−20 WIDE
SOIC−20 WIDE
DATA
TSSOP−20*
TSSOP−20*
TSSOP−20*
TSSOP−20*
SOEIAJ−20
SOEIAJ−20
SOEIAJ−20
SOEIAJ−20
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
Package
PDIP−20
PDIP−20
A
2
A1
A2
A3
A4
A5
A6
A7
A8
Operation
2
3
4
5
6
7
8
9
19
1
Figure 2. Logic Diagram
PIN 10 = GND
PIN 20 = V
CC
1000 Tape & Reel
1000 Tape & Reel
2500 Tape & Reel
2500 Tape & Reel
2000 Tape & Reel
2000 Tape & Reel
18 Units / Rail
18 Units / Rail
38 Units / Rail
38 Units / Rail
75 Units / Rail
75 Units / Rail
40 Units / Rail
40 Units / Rail
Shipping
18
17
16
15
14
13
12
11
B1
B2
B3
B4
B5
B6
B7
B8
B
DATA
PORT

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