MAX7313AEG Maxim Integrated Products, MAX7313AEG Datasheet - Page 6

• Manufacturer Part Number: MAX7313AEG
• Description: I/O Expanders, Repeaters & Hubs 16-Bit I/O Port Expander
• Manufacturer: Maxim Integrated Products

Specifications of MAX7313AEG

• Package / Case: QSOP-24
• Mounting Style: SMD/SMT
• Lead Free Status / Rohs Status: No

The MAX7313 is a general-purpose input/output (GPIO)
peripheral that provides 16 I/O ports, P0–P15, con-
trolled through an I
17th output-only port, INT/O16, can be configured as
an interrupt output or as a general-purpose output port.
All output ports sink loads up to 50mA connected to
external supplies up to 5.5V, independent of the
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Figure 1. Simplified Schematic of I/O Ports
6
4–11, 13–20
_______________________________________________________________________________________
21, 2, 3
QSOP
12
22
23
24
—
1
PIN
1–8, 10–17
18, 23, 24
2
QFN
C-compatible serial interface. A
PAD
Functional Overview
22
19
20
21
9
CONFIGURATION
SHIFT REGISTER
SHIFT REGISTER
WRITE PULSE
READ PULSE
DATA FROM
DATA FROM
PULSE
WRITE
Exposed pad
AD0, AD1,
INT/O16
P0–P15
NAME
GND
SDA
AD2
SCL
CONFIGURATION
V+
REGISTER
D
C
K
FF
Q
Q
Output Port. Open-drain output rated at 7V, 50mA. Configurable as interrupt
output or general-purpose output.
Address Inputs. Sets device slave address. Connect to either GND, V+,
SCL, or SDA to give 64 logic combinations. See Table 1.
Input/Output Ports. P0–P15 are open-drain I/Os rated at 5.5V, 50mA.
Ground. Do not sink more than 350mA into the GND pin.
I
I
Positive Supply Voltage. Bypass V+ to GND with a 0.047µF ceramic
capacitor.
Exposed pad on package underside. Connect to GND.
2
2
C-Compatible Serial Clock Input
C-Compatible Serial Data I/O
REGISTER
OUTPUT
D
C
PORT
K
FF
INPUT PORT
REGISTER
D
C
Q
Q
K
FF
Q
Q
MAX7313’s supply voltage. The MAX7313 is rated for a
ground current of 350mA, allowing all 17 outputs to sink
20mA at the same time. Figure 1 shows the output
structure of the MAX7313. The ports default to inputs on
power-up.
Input ports registers reflect the incoming logic levels of
the port pins, regardless of whether the pin is defined
Port Inputs and Transition Detection
Q2
FUNCTION
OUTPUT PORT
REGISTER DATA
I/O PIN
GND
INPUT PORT
REGISTER DATA
TO INT
Pin Description