CY7C460A-10JI Cypress Semiconductor Corp, CY7C460A-10JI Datasheet - Page 9

• Manufacturer Part Number: CY7C460A-10JI
• Description: FIFO Mem Async Dual Depth/Width Uni-Dir 8K x 9 32-Pin PLCC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C460A-10JI

• Package: 32PLCC
• Configuration: Dual
• Bus Directional: Uni-Directional
• Density: 72 Kb
• Organization: 8Kx9
• Data Bus Width: 9 Bit
• Timing Type: Asynchronous
• Expansion Type: Depth|Width
• Typical Operating Supply Voltage: 5 V
• Operating Temperature: -40 to 85 °C

number of writes equal-to-or-less-than the depth of the FIFO
have occurred since the last MR cycle. A LOW pulse on RT
resets the internal read pointer to the first physical location of
the FIFO. R and W must both be HIGH while and t
retransmit is LOW. With every read cycle after retransmit, pre-
viously accessed data is read and the read pointer increment-
ed until equal to the write pointer. Full, Half Full, and Empty
flags are governed by the relative locations of the read and
write pointers and are updated during a retransmit cycle. Data
written to the FIFO after activation of RT are transmitted also.
The full depth of the FIFO can be repeatedly retransmitted.
Standalone/Width Expansion Modes
Standalone and width expansion modes are set by grounding
expansion in (XI) and tying first load (FL) to V
cycle. FIFOs can be expanded in width to provide word widths
greater than nine in increments of nine. During width expan-
sion mode, all control line inputs are common to all devices,
and flag outputs from any device can be monitored.
Document #: 38-06011 Rev. *A
FULL
D
0-8
W
RS
9
CC
prior to a MR
Figure 1. Depth Expansion
9
9
9
FF
FF
FF
RTR
after
CY7C460A
CY7C462A
CY7C464A
CY7C466A
CY7C460A
CY7C462A
CY7C464A
CY7C466A
CY7C460A
CY7C462A
CY7C464A
CY7C466A
XO
XO
XO
XI
XI
XI
Depth Expansion Mode (see Figure 1)
Depth expansion mode is entered when, during a MR cycle,
expansion out (XO) of one device is connected to expansion
in (XI) of the next device, with XO of the last device connected
to XI of the first device. In the depth expansion mode, the first
load (FL) input, when grounded, indicates that this is the first
part to be loaded. All other devices must have this pin HIGH.
To enable the correct FIFO, XO is pulsed LOW when the last
physical location of the previous FIFO is written to and is
pulsed LOW again when the last physical location is read.
Only one FIFO is enabled for Read and one is enabled for
Write at any given time. All other devices are in standby.
FIFOs can also be expanded simultaneously in depth and
width. Consequently, any depth or width FIFO can be created
with word widths in increments of nine. When expanding in
depth, a composite FF is created by ORing the FFs together.
Likewise, a composite EF is created by ORing EFs together.
HF and RT functions are not available in depth expansion
mode.
*
* FIRST DEVICE
EF
FL
EF
FL
EF
FL
CY7C460A/CY7C462A
CY7C464A/CY7C466A
9
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C460A–17
EMPTY
R
Q
V
0-8
CC