CY7C1021CV33-15ZI Cypress Semiconductor Corp, CY7C1021CV33-15ZI Datasheet

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CY7C1021CV33-15ZI

Manufacturer Part Number
CY7C1021CV33-15ZI
Description
SRAM Chip Async Single 3.3V 1M-Bit 64K x 16 15ns 44-Pin TSOP-II
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1021CV33-15ZI

Package
44TSOP-II
Timing Type
Asynchronous
Density
1 Mb
Typical Operating Supply Voltage
3.3 V
Number Of I/o Lines
16 Bit
Number Of Ports
1
Number Of Words
64K

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Part Number:
CY7C1021CV33-15ZI
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MOT
Quantity:
9
Cypress Semiconductor Corporation
Document #: 38-05132 Rev. *C
Features
Functional Description
The CY7C1021CV33 is a high-performance CMOS static
RAM organized as 65,536 words by 16 bits. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
Selection Guide
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
Logic Block Diagram
• Pin- and function-compatible with CY7C1021BV33
• High speed
• CMOS for optimum speed/power
• Low active power
• Data retention at 2.0V
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 44-pin TSOP II, 400-mil SOJ, 48-ball FBGA
A
A
A
A
A
A
A
A
— t
— 360 mW (max.)
1
4
3
2
0
7
6
5
AA
= 8, 10, 12, and 15 ns
DATA IN DRIVERS
COLUMN DECODER
512 X 2048
RAM Array
64K x 16
CY7C1021CV33-8
95
8
5
3901 North First Street
CY7C1021CV33-10
(BLE) is LOW, then data from I/O pins (I/O
written into the location specified on the address pins (A
through A
from I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
LOW, then data from memory will appear on I/O
the truth table at the end of this data sheet for a complete
description of Read and Write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a Write operation
(CE LOW, and WE LOW).
The CY7C1021CV33 is available in standard 44-pin TSOP
Type II 400-mil-wide SOJ packages, as well as a 48-ball
FBGA.
10
90
5
I/O
I/O
15
1
9
BHE
WE
CE
OE
BLE
San Jose
). If Byte High Enable (BHE) is LOW, then data
–I/O
–I/O
CY7C1021CV33-12
8
16
9
64K x 16 Static RAM
through I/O
12
85
5
1
to I/O
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
V
Pin Configuration
WE
A
A
A
A
NC
CE
CC
A
A
A
A
A
SS
15
14
13
12
1
4
3
2
1
0
1
2
3
4
5
6
7
8
CA 95134
through I/O
SOJ / TSOP II
8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
. If Byte High Enable (BHE) is
16
Top View
0
) is written into the location
through A
Revised October 30, 2002
CY7C1021CV33-15
CY7C1021CV33
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
16
A
A
A
OE
BHE
BLE
I/O
I/O
I/O
I/O
V
V
I/O
I/O
I/O
I/O
NC
A
A
A
A
NC
) are placed in a
15
80
1
15
5
5
6
7
SS
CC
8
9
10
11
through I/O
16
15
14
13
12
11
10
9
).
408-943-2600
9
to I/O
16
Unit
. See
8
mA
mA
ns
), is
0

Related parts for CY7C1021CV33-15ZI

CY7C1021CV33-15ZI Summary of contents

Page 1

... HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a Write operation (CE LOW, and WE LOW). The CY7C1021CV33 is available in standard 44-pin TSOP Type II 400-mil-wide SOJ packages, as well as a 48-ball FBGA. I/O ...

Page 2

... Pin Configuration Document #: 38-05132 Rev. *C 48-ball FBGA (Top View BLE I BHE I/O I/O I I I/O I I/O I I/O I I CY7C1021CV33 Page ...

Page 3

... MAX > > < MAX , 5 CC – 0.3V, V > – 0.3V, < 0.3V Test Conditions MHz 3.3V CC CY7C1021CV33 Ambient Temperature +70 C – +85 C Min. Max. Min. Max. Min. 2.4 2.4 2.4 0.4 0.4 2.0 V 2 0.3 + 0.3 0.3 0.8 –0.3 0.8 –0 –1 +1 – ...

Page 4

... AC characteristics (except High-Z) for all 8-ns parts are tested using the load conditions shown in Figure (a). All other speeds are tested using the Thevenin load shown in Figure (b). High-Z characteristics are tested for all speeds using the test load shown in Figure (d). Document #: 38-05132 Rev. *C [4] 10-, 12-, 15-ns devices pF* 1.5V (a) High-Z characteristics: 90% 10% (c) Fall Time: 1 V/ns CY7C1021CV33 R 317 3.3V OUTPUT 351 (b) R 317 3.3V OUTPUT 351 ...

Page 5

... Write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the Write. Document #: 38-05132 Rev. *C [5] 1021CV33-8 1021CV33-10 Min. Max. Min. Max less than less than t , and t HZCE LZCE HZOE LZOE CY7C1021CV33 1021CV33-12 1021CV33-15 Min. Max. Min. Max ...

Page 6

... Device is continuously selected. OE, CE, BHE and/or BHE = V 11 HIGH for Read cycle. 12. Address valid prior to or coincident with CE transition LOW. Document #: 38-05132 Rev OHA [11, 12 ACE t DOE t LZOE t DBE t LZBE 50 CY7C1021CV33 DATA VALID t HZOE t HZCE t HZBE IMPEDANCE DATA VALID t PD 50% HIGH I ICC CC I ISB SB Page ...

Page 7

... Write Cycle No. 2 (BLE or BHE Controlled) ADDRESS t SA BHE, BLE WE CE DATA I/O Notes: 13. Data I/O is high impedance BHE and/or BLE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05132 Rev. *C [13, 14 SCE PWE PWE t SCE . IH CY7C1021CV33 Page ...

Page 8

... Read – Lower bits only Data Out Read – Upper bits only Data In Write – All bits High-Z Write – Lower bits only Data In Write – Upper bits only High-Z Selected, Outputs Disabled High-Z Selected, Outputs Disabled CY7C1021CV33 LZWE Mode Power Standby (I Active (I ...

Page 9

... CY7C1021CV33-10ZC CY7C1021CV33-10ZI CY7C1021CV33-10BAC CY7C1021CV33-10BAI 12 CY7C1021CV33-12VC CY7C1021CV33-12VI CY7C1021CV33-12ZC CY7C1021CV33-12ZI CY7C1021CV33-12BAC CY7C1021CV33-12BAI 15 CY7C1021CV33-15VC CY7C1021CV33-15VI CY7C1021CV33-15ZC CY7C1021CV33-15ZI CY7C1021CV33-15BAC CY7C1021CV33-15BAI Document #: 38-05132 Rev. *C Package Name Package Type V34 44-lead (400-Mil) Molded SOJ Z44 44-lead TSOP Type II BA48A 48-ball FBGA V34 44-lead (400-Mil) Molded SOJ Z44 ...

Page 10

... Package Diagrams 48-Ball (7. 7. 1.2 mm) FBGA BA48A Document #: 38-05132 Rev. *C CY7C1021CV33 51-85096-*E Page ...

Page 11

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 44-Lead (400-Mil) Molded SOJ V34 44-pin TSOP II Z44 CY7C1021CV33 51-85082-*B 51-85087-*A Page ...

Page 12

... Document History Page Document Title: CY7C1021CV33 64K x 16 Static RAM Document Number: 38-05132 Issue REV. ECN NO. Date ** 109472 12/06/01 *A 115044 05/08/02 *B 115808 06/25/02 *C 120413 10/31/02 Document #: 38-05132 Rev. *C Orig. of Change Description of Change HGK New Data Sheet HGK Ram7 version C4K x 16 Async. ...

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