PIC18F4585-H/P Microchip Technology, PIC18F4585-H/P Datasheet - Page 349

• Manufacturer Part Number: PIC18F4585-H/P
• Description: IC MCU 8BIT 48KB FLASH 40PDIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4585-H/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 24-4:
REGISTER 24-5:
© 2007 Microchip Technology Inc.
bit 7
bit 6-3
bit 2
bit 1
bit 0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
bit 7
MCLRE: MCLR Pin Enable bit
1 = MCLR pin enabled; RE3 input pin disabled
0 = RE3 input pin enabled; MCLR disabled
Unimplemented: Read as ‘0’
LPT1OSC: Low-Power Timer 1 Oscillator Enable bit
1 = Timer1 configured for low-power operation
0 = Timer1 configured for higher power operation
PBADEN: PORTB A/D Enable bit
(Affects ADCON1 Reset state. ADCON1 controls PORTB<4:0> pin configuration.)
1 = PORTB<4:0> pins are configured as analog input channels on Reset
0 = PORTB<4:0> pins are configured as digital I/O on Reset
Unimplemented: Read as ‘0’
bit 7
DEBUG: Background Debugger Enable bit
1 = Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
0 = Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug
XINST: Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode enabled
0 = Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
BBSIZ1: Boot Block Size Select Bit 1
11 = 4K words (8 Kbytes) boot block
10 = 4K words (8 Kbytes) boot block
BBSIZ2: Boot Block Size Select Bit 0
01 = 2K words (4 Kbytes) boot block
00 = 1K words (2 Kbytes) boot block
Unimplemented: Read as ‘0’
LVP: Single-Supply ICSP Enable bit
1 = Single-Supply ICSP enabled
0 = Single-Supply ICSP disabled
Unimplemented: Read as ‘0’
STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack full/underflow will cause Reset
0 = Stack full/underflow will not cause Reset
Legend:
R = Readable bit
-n = Value when device is unprogrammed
Legend:
R = Readable bit
-n = Value when device is unprogrammed
MCLRE
DEBUG
R/P-1
R/P-1
XINST
R/P-0
U-0
—
PIC18F2585/2680/4585/4680
P = Programmable bit
BBSIZ1
C = Clearable bit
R/P-0
U-0
—
Preliminary
BBSIZ2
R/P-0
U-0
—
U-0
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
—
U-0
—
LPT1OSC
R/P-0
R/P-1
LVP
PBADEN
R/P-1
U-0
DS39625C-page 347
—
STVREN
R/P-1
U-0
—
bit 0
bit 0