MAX4358ECE+ Maxim Integrated Products, MAX4358ECE+ Datasheet - Page 36

• Manufacturer Part Number: MAX4358ECE+
• Description: IC VIDEO CROSSPOINT SWIT 144TQFP
• Manufacturer: Maxim Integrated Products

Specifications of MAX4358ECE+

• Function: Video Crosspoint Switch
• Circuit: 1 x 32:16
• Voltage Supply Source: Single, Dual Supply
• Voltage - Supply, Single/dual (±): 5V, ± 3 V ~ 5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

32 x 16 Nonblocking Video Crosspoint Switch
with On-Screen Display Insertion and I/O Buffers
Figure 6. 128 x 32 Nonblocking Matrix Using 32 x 16
Crosspoint Devices
36
Table 5. Output Selection Programming
(96–127)
______________________________________________________________________________________
INPUTS
INPUTS
INPUTS
INPUTS
(32–63)
(64–95)
(0–31)
B3 (MSB)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
32
IN
32
IN
32
IN
32
IN
MAX4358
MAX4358
MAX4358
MAX4358
OUT
OUT
OUT
OUT
OUTPUTS (0–15)
16
16
16
16
OUTPUT ADDRESS BIT
32
IN
32
IN
32
IN
32
IN
B2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
MAX4358
MAX4358
MAX4358
MAX4358
OUTPUTS (16–31)
OUT
OUT
OUT
OUT
16
16
16
16
B1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
The most straightforward technique for implementing
nonblocking matrices is to arrange the building blocks
in a grid. The inputs connect to each vertical bank of
devices in parallel with the other banks. The outputs of
each building block in a vertical column connect
together in a wired-OR configuration. Figure 6.shows a
128-input, 32-output, nonblocking array using eight
MAX4358 crosspoint devices.
The wire-OR connection of the outputs shown in the
diagram is possible because the outputs of the IC
devices can be placed in a disabled, or high-imped-
ance-output state. This disable state of the output
buffers is designed for a maximum impedance vs. fre-
quency while maintaining a low output capacitance.
These characteristics minimize the adverse loading
effects from the disabled outputs. Larger arrays are
constructed by extending this connection technique to
more devices.
Figure 6 shows an implementation requiring many out-
puts to be wired together. This creates a situation
where each output buffer sees not only the normal load
impedance, but also the disabled impedance of all the
other outputs. This impedance has a resistive and a
capacitive component. The resistive components
reduce the total effective load for the driving output.
B0 (LSB)
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Driving a Capacitive Load
SELECTED OUTPUT
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9