AD8115AST Analog Devices Inc, AD8115AST Datasheet

IC VIDEO CROSSPOINT SWIT 100LQFP

AD8115AST

Manufacturer Part Number
AD8115AST
Description
IC VIDEO CROSSPOINT SWIT 100LQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8115AST

Rohs Status
RoHS non-compliant
Function
Video Crosspoint Switch
Circuit
1 x 16:16
Voltage Supply Source
Dual Supply
Voltage - Supply, Single/dual (±)
±4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Array Configuration
16x16
Number Of Arrays
1
Screening Level
Industrial
Pin Count
100
Package Type
LQFP
Power Supply Requirement
Dual
Lead Free Status / RoHS Status
Not Compliant

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FEATURES
16 × 16 high speed nonblocking switch arrays
Serial or parallel programming of switch array
Serial data out allows daisy-chaining of multiple
High impedance output disable allows connection of
For smaller arrays see the AD8108/AD8109 (8 × 8) or
Complete solution
Excellent video performance
Excellent ac performance
Low power of 700 mW (2.75 mW per point)
Low all hostile crosstalk of −70 dB @ 5 MHz
Reset pin allows disabling of all outputs (connected through
100-lead LQFP (14 mm × 14 mm)
APPLICATIONS
Routing of high speed signals including
GENERAL DESCRIPTION
The AD8114/AD8115
switch matrices. They offer a −3 dB signal bandwidth greater
than 200 MHz and channel switch times of less than 50 ns
with 1% settling. With −70 dB of crosstalk and −90 dB isolation
(@ 5 MHz), the AD8114/AD8115 are useful in many high speed
applications. The differential gain and differential phase of better
than 0.05% and 0.05°, respectively, along with 0.1 dB
1
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Patent pending.
AD8114; G = 1
AD8115; G = 2
16 × 16 arrays to create larger switch arrays
multiple devices without loading the output bus
AD8110/AD8111 (16× 8) switch arrays
Buffered inputs
Programmable high impedance outputs
16 output amplifiers, AD8114 (G = 1), AD8115 (G = 2)
Drives 150 Ω loads
25 MHz, 0.1 dB gain flatness
0.05%/0.05° differential gain/differential phase error
−3 dB bandwidth: 225 MHz
Slew rate: 375 V/µs
a capacitor to ground provides power-on reset capability)
Video (NTSC, PAL, S, SECAM, YUV, RGB)
Compressed video (MPEG, wavelet)
3-level digital video (HDB3)
Datacomms
Telecomms
(R
L
= 150 Ω)
1
are high speed 16 × 16 video crosspoint
flatness out to 25 MHz while driving a 75 Ω back-terminated
load, make the AD8114/AD8115 ideal for all types of signal
switching.
The AD8114/AD8115 include 16 independent output buffers
that can be placed into a high impedance state for paralleling
crosspoint outputs so that off channels do not load the output
bus. The AD8114 has a gain of 1, while the AD8115 offers a
gain of 2. They operate on voltage supplies of ±5 V while
consuming only 70 mA of idle current. The channel switching is
performed via a serial digital control (which can accommodate
daisy-chaining of several devices) or via a parallel control,
allowing updating of an individual output without
reprogramming the entire array.
The AD8114/AD8115 is packaged in 100-lead LQFP package
and is available over the extended industrial temperature range
of −40°C to +85°C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
16 INPUTS
UPDATE
DATA IN
RESET
16 × 16 Crosspoint Switches
CLK
CE
FUNCTIONAL BLOCK DIAGRAM
AD8114/AD8115
SER/PAR D0 D1 D2 D3 D4
© 2005 Analog Devices, Inc. All rights reserved.
16 × 5:16 DECODERS
PARALLEL LATCH
80-BIT SHIFT REGISTER
PARALLEL LOADING
DECODE
SWITCH
MATRIX
Low Cost 225 MHz
Figure 1.
WITH 5-BIT
AD8114/AD8115
80
80
256
OUTPUT
BUFFER
G = +1,
G = +2
SET
INDIVIDUAL
OR RESET
ALL OUTPUTS
TO "OFF"
16
www.analog.com
A0
A1
A2
A3
DATA
OUT
16
OUTPUTS

Related parts for AD8115AST

AD8115AST Summary of contents

Page 1

FEATURES 16 × 16 high speed nonblocking switch arrays AD8114 AD8115 Serial or parallel programming of switch array Serial data out allows daisy-chaining of multiple 16 × 16 arrays to create larger switch arrays ...

Page 2

AD8114/AD8115 TABLE OF CONTENTS AD8114/AD8115—Specifications ................................................. 3 Timing Characteristics (Serial) .................................................. 5 Timing Characteristics (Parallel) ............................................... 6 Absolute Maximum Ratings............................................................ 8 Maximum Power Dissipation ..................................................... 8 ESD Caution.................................................................................. 8 Pin Configuration and Function Descriptions............................. 9 Typical Performance Characteristics ........................................... 11 ...

Page 3

AD8114/AD8115—SPECIFICATIONS V = ± +25° kΩ, unless otherwise noted Table 1. Parameter DYNAMIC PERFORMANCE −3 dB Bandwidth Gain Flatness Propagation Delay Settling Time Slew Rate NOISE/DISTORTION PERFORMANCE Differential Gain Error Differential ...

Page 4

AD8114/AD8115 Parameter POWER SUPPLIES Supply Current Supply Voltage Range PSRR OPERATING TEMPERATURE RANGE Temperature Range θ JA Conditions AVCC, outputs enabled, no load AVCC, outputs disabled AVEE, outputs enabled, no load AVEE, outputs disabled DVCC, outputs enabled, no load DC ...

Page 5

TIMING CHARACTERISTICS (SERIAL) Table 2. Timing Characteristics Parameter Serial Data Setup Time CLK Pulse Width Serial Data Hold Time CLK Pulse Separation, Serial Mode CLK to UPDATE Delay UPDATE Pulse Width CLK to DATA OUT Valid, Serial Mode Propagation Delay, ...

Page 6

AD8114/AD8115 TIMING CHARACTERISTICS (PARALLEL) Table 4. Timing Characteristics Parameter Data Setup Time CLK Pulse Width Data Hold Time CLK Pulse Separation CLK to UPDATE Delay UPDATE Pulse Width Propagation Delay, UPDATE to Switch On or Off CLK, UPDATE Rise and ...

Page 7

Table 6. Operation Truth Table CE UPDATE CLK DATA IN DATA OUT Data Data D0…D4 parallel mode f A0… ...

Page 8

AD8114/AD8115 ABSOLUTE MAXIMUM RATINGS Table 7. Parameter Rating Supply Voltage 12 Internal Power Dissipation 2.6 W AD8114/AD8115 100-Lead Plastic LQFP (ST) Input Voltage ±V Output Short-Circuit Duration Observe power derating curves Storage Temperature Range 2 −65°C to +125°C ...

Page 9

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DVCC 1 PIN 1 DGND 2 AGND 3 IN08 4 AGND 5 IN09 6 AGND 7 IN10 8 AGND 9 IN11 10 AGND 11 IN12 12 AGND 13 IN13 14 AGND 15 IN14 16 AGND ...

Page 10

AD8114/AD8115 Table 8. Pin Function Descriptions Pin No. Mnemonic 58, 60, 62, 64, 66, 68, 70, 72, INxx 10, 12, 14, 16 DATA IN 97 CLK 98 DATA OUT 95 UPDATE 100 RESET 99 CE ...

Page 11

TYPICAL PERFORMANCE CHARACTERISTICS 1 GAIN 0 FLATNESS –1 –2 –3 2V p-p –4 – SHOWN O – 150Ω L –7 0 FREQUENCY (MHz) Figure 7. AD8114 Frequency Response GAIN 0 ...

Page 12

AD8114/AD8115 1kΩ L – 37.5Ω T –20 –30 –40 ALL HOSTILE –50 –60 –70 –80 –90 –100 0 FREQUENCY (MHz) Figure 13. AD8114 Crosstalk vs. Frequency p-p –10 O ...

Page 13

FREQUENCY (MHz) Figure 19. AD8114 Input Impedance vs. Frequency 1000 100 10 1 0.1 0 100 FREQUENCY (MHz) Figure 20. AD8114 Output Impedance, Enabled vs. Frequency 1M 100k 10k 1k ...

Page 14

AD8114/AD8115 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 0 FREQUENCY (MHz) Figure 25. AD8114 Off Isolation, Input-Output –20 –30 –40 –50 –PSRR –60 +PSRR –70 –80 –90 –100 1 0.03 0.1 FREQUENCY (MHz) Figure ...

Page 15

V O 0.15V R 0.10V 0.05V 0V –0.05V –0.10V –0.15V 50mV Figure 31. AD8114 Pulse Response, Small Signal 1.5V 1.0V 0.5V 0V –0.5V –1.0V –1.5V 500mV Figure 32. AD8114 Pulse Response, Large Signal UPDATE INPUT 0 V OUT AT –1V ...

Page 16

AD8114/AD8115 5V UPDATE 0V 0.05V 0V –0.05V Figure 37. AD8114 Switching Transient (Glitch) 260 240 220 200 180 160 140 120 100 –12 –8 –4 0 –10 –6 –2 OFFSET VOLTAGE (mV) Figure 38. AD8114 ...

Page 17

I/O SCHEMATICS V CC ESD INPUT ESD AVEE Figure 43. Analog Input V CC ESD OUTPUT ESD AVEE Figure 44. Analog Output V CC 20kΩ ESD RESET ESD DGND Figure 45. Reset Input ESD INPUT ESD Figure 46. Logic Input ...

Page 18

AD8114/AD8115 THEORY OF OPERATION The AD8114 ( and AD8115 ( are crosspoint arrays with 16 outputs, each of which can be connected to any one of 16 inputs. Organized by output row, 16 switchable transconductance stages ...

Page 19

If more than one AD8114/AD8115 device serially programmed in a system, the DATA OUT signal from one device can be connected to the DATA IN of the next device to form a serial chain. All of the ...

Page 20

AD8114/AD8115 of 2 that eliminates the need for a gain-of-2 buffer to drive a video line. Its high output disabled impedance minimizes signal degradation when paralleling additional outputs. CREATING LARGER CROSSPOINT ARRAYS The AD8114/AD8115 are high density building blocks for ...

Page 21

IN 00– TERM IN 16– TERM IN 32– TERM IN 48– TERM IN 64– TERM IN 80– TERM IN 96–111 16 R TERM IN 112–127 16 R TERM ...

Page 22

AD8114/AD8115 signals that make up the video channel. Thus, one differential video channel is assigned to a pair of crosspoint channels, both input and output. For a single AD8114/AD8115, eight differential video channels can be assigned to the 16 inputs ...

Page 23

Measuring Crosstalk Crosstalk is measured by applying a signal to one or more channels and measuring the relative strength of that signal on a desired selected channel. The measurement is usually expressed as dB down from the magnitude of the ...

Page 24

AD8114/AD8115 Effect of Impedances on Crosstalk The input side crosstalk can be influenced by the output impedance of the sources that drive the inputs. The lower the impedance of the drive source, the lower the magnitude of the crosstalk. The ...

Page 25

PCB LAYOUT Extreme care must be exercised to minimize additional crosstalk generated by the system circuit board(s). The areas that must be carefully detailed are grounding, shielding, signal routing, and supply bypassing. The packaging of the AD8114/AD8115 is designed to ...

Page 26

AD8114/AD8115 Figure 51. Component Side Silkscreen Figure 52. Board Layout (Component Side) Rev Page ...

Page 27

Figure 53. Board Layout (Signal Layer) Figure 54. Board Layout (Ground Plane) Rev Page AD8114/AD8115 ...

Page 28

AD8114/AD8115 Figure 55. Board Layout (Circuit Side) Figure 56. Circuit Side Silkscreen Rev Page ...

Page 29

EVALUATION BOARD DVCC DGND NC AVEE AGND AVCC P1-1 P1-2 P1-3 P1-4 P1-5 + JUMPER + 0.1µF 10µF 0.1µF 0.1µF 10µF INPUT 00 75Ω INPUT 01 75Ω INPUT 02 75Ω INPUT 03 75Ω INPUT 04 75Ω INPUT 05 75Ω INPUT ...

Page 30

AD8114/AD8115 CONTROL THE EVALUATION BOARD FROM A PC The evaluation board includes Windows®-based control software and a custom cable that connects the board’s digital interface to the printer port of the PC. The wiring of this cable is shown in ...

Page 31

... ORDERING GUIDE Model Temperature Range AD8114AST −40°C to +85°C AD8114ASTZ 2 −40°C to +85°C AD8115AST −40°C to +85°C AD8115ASTZ 2 −40°C to +85°C AD8114-EVAL AD8115-EVAL 1 Details of the lead finish composition can be found on the ADI website Pb-free part. 1.60 MAX BSC SQ 0 ...

Page 32

AD8114/AD8115 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01070–0–9/05(B) Rev Page ...

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