AD8182AN Analog Devices Inc, AD8182AN Datasheet - Page 3

• Manufacturer Part Number: AD8182AN
• Description: IC MULTIPLEXER DUAL 2X1 14DIP
• Manufacturer: Analog Devices Inc

Specifications of AD8182AN

• Rohs Status: RoHS non-compliant
• Function: Multiplexer
• Circuit: 2 x 2:1
• Voltage Supply Source: Dual Supply
• Voltage - Supply, Single/dual (±): ±4 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 14-DIP (0.300", 7.62mm)

REV. B
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V
Internal Power Dissipation
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Short Circuit Duration . . . . . Observe Power Derating Curves
Storage Temperature Range
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . . +300 C
NOTES
1
2
Model
AD8180AN
AD8180AR
AD8180AR-REEL
AD8180AR-REEL7 –40 C to +85 C 7" Reel SOIC
AD8182AN
AD8182AR
AD8182AR-REEL
AD8182AR-REEL7 –40 C to +85 C 7" Reel SOIC
AD8180-EB
AD8182-EB
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
AD8180 and AD8182 is limited by the associated rise in junc-
tion temperature. The maximum safe junction temperature for
plastic encapsulated devices is determined by the glass transition
temperature of the plastic, approximately +150 C. Exceeding
this limit temporarily may cause a shift in parametric perfor-
mance due to a change in the stresses exerted on the die by the
package. Exceeding a junction temperature of +175 C for an
extended period can result in device failure.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8180/AD8182 feature proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
NOTES
1
2
3
4
5
6
7
8
9
Specifications subject to change without notice.
Stresses above those listed under Absolute Maximum Ratings may cause perma-
Specification is for device in free air: 8-Lead Plastic DIP Package:
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
8-Lead SOIC Package:
14-Lead SOIC Package:
ENABLE pin is grounded. IN0 = +1 V dc, IN1 = –1 V dc. SELECT input is driven with 0 V to +5 V pulse. Measure transition time from 50% of the SELECT input value
ENABLE pin is driven with 0 V to +5 V pulse (with 3 ns edges). State of SELECT input determines which channel is activated (i.e., if SELECT = Logic 0, IN0 is selected). Set
All inputs are grounded. SELECT input is driven with 0 V to +5 V pulse. The outputs are monitored. Speeding the edges of the SELECT pulse increases the glitch magnitude
Decreasing R
A resistor (R
Select input which is not being driven (i.e., if SELECT is Logic 1, input activated is IN1); drive all other inputs with V
Mux is disabled (i.e., ENABLE = Logic 1) and all inputs are driven simultaneously with V
Voltage gain decreases for lower values of R
Larger values of R
(+2.5 V) and 10% (or 90%) of the total output voltage transition from IN0 channel voltage (+1 V) to IN1 (–1 V), or vice versa.
IN0 = +1 V dc, IN1 = –1 V dc, and measure transition time from 50% of ENABLE pulse (+2.5 V) to 90% of the total output voltage change. In Figure 5, t
time, t
due to coupling via the ground plane. Removing the SELECT input termination will lower glitch, as does increasing R
width (see Figure 20.)
R
R
ance determines the crosstalk.
(i.e., the voltage gain is approximately 0.97 V/V (3% gain error) for R
AD8180 8-Lead Plastic DIP (N) . . . . . . . . . . . . . . . . 1.3 Watts
AD8180 8-Lead Small Outline (R) . . . . . . . . . . . . . . 0.9 Watts
AD8182 14-Lead Plastic DIP (N) . . . . . . . . . . . . . . . 1.6 Watts
AD8182 14-Lead Small Outline (R) . . . . . . . . . . . . . 1.0 Watts
N and R Package . . . . . . . . . . . . . . . . . . . . . . –65 C to +125 C
L
ON
= 1 k (see Figure 13).
of one enabled mux within a system (see Figure 14). In this mode the output impedance is very high (typ 10 M ), and the signal couples across the package; the load imped-
ON
is the enable time.
S
L
) placed in series with the mux inputs serves to optimize 0.1 dB flatness, but is not required. Increasing output capacitance will increase peaking and reduce band-
lowers the bandwidth slightly. Increasing C
L
provide wider output voltage swings, as well as better gain accuracy. See Note 8.
Temperature
Range
–40 C to +85 C 8-Lead Plastic DIP
–40 C to +85 C 8-Lead SOIC
–40 C to +85 C 13" Reel SOIC
–40 C to +85 C 14-Lead Plastic DIP
–40 C to +85 C 14-Lead Narrow SOIC R-14
–40 C to +85 C 13" Reel SOIC
JA
ORDERING GUIDE
JA
= 155 C/W; 14-Lead Plastic Package:
= 120 C/W, where P
2
L
. The resistive divider formed by the mux enabled output resistance (27
Package
Description
Evaluation Board
Evaluation Board
1
D
= (T
L
J
lowers the bandwidth considerably (see Figure 19).
–T
A
)/
JA
.
L
JA
JA
= 1 k ).
= 90 C/W;
= 75 C/W;
Package
Option
N-8
SO-8
SO-8
SO-8
N-14
R-14
R-14
V
S
–3–
IN
While the AD8180 and AD8182 are internally short circuit
protected, this may not be sufficient to guarantee that the maxi-
mum junction temperature (+150 C) is not exceeded under all
conditions. To ensure proper operation, it is necessary to observe
the maximum power derating curves shown in Figures 2 and 3.
= 0.446 V rms. Output is monitored at ƒ = 5 and 30 MHz. R
Figure 2. AD8180 Maximum Power Dissipation vs.
Temperature
Figure 3. AD8182 Maximum Power Dissipation vs.
Temperature
2.0
1.5
1.0
0.5
2.5
2.0
1.5
1.0
0.5
0
–50
–50
–40 –30 –20 –10 0
–40 –30 –20 –10 0
14-LEAD SOIC
L
IN
) and R
.
8-LEAD SOIC PACKAGE
AMBIENT TEMPERATURE – C
AMBIENT TEMPERATURE – C
= 0.707 V rms and monitor output at ƒ = 5 and 30 MHz.
8-LEAD PLASTIC DIP PACKAGE
L
causes a gain which decreases as R
10 20 30
10 20
WARNING!
14-LEAD
PLASTIC DIP PACKAGE
30 40 50
AD8180/AD8182
40
50 60
ESD SENSITIVE DEVICE
T
T
60
J
J
= +150 C
= +150 C
L
70
70 80
= 30
OFF
80
is the disable
L
90
to simulate
90
decreases