3222/3223-DB1 Silicon Laboratories Inc, 3222/3223-DB1 Datasheet - Page 38

• Manufacturer Part Number: 3222/3223-DB1
• Description: EVAL BOARD FOR IA3222/3223
• Manufacturer: Silicon Laboratories Inc
• Series: EZ DAA™r

Specifications of 3222/3223-DB1

• Main Purpose: Telecom, Data Acquisition Arrangement (DAA)
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: IA3222, IA3223
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

IA3222/23
7. Registers
7.1. Register Map*
7.2. Control Register
38
*Note: REVID is a read-only bit, hardwired to zero.
*Note: Refer to "6. Line Monitoring" on page 29 for a description of the Line-Status pin.
Control Bit
A2
0
0
0
0
1
1
1
SGAIN
LSR*
PWD
OFH
A1
0
0
1
1
0
0
1
Off-hook command
Line Status Ring
A0
X
0
1
0
1
0
1
Power down
Select gain
Definition
Line Side programming MSB
Line Side programming LSB
Line status (read only)
Thresholds
Reserved
Register
Dividers
Control
state of the LACT status bit
Line-Status pin reflects the
Function when Low
Normal transmit gain
Low-gain Caller ID
Normal operation
(inverted).
On hook
Rev. 5.0
RNG/PPU
LTH1
OFH
LP5
LP1
D3
Line-Status pin reflects the state
Off hook, ORed with OfHk pin
Additional 6 dB of transmitter
of the RNG/PPU status bit
Device powered down
Function when High
High-gain Caller ID
LIU/LD
LTH0
LSR
LP4
LP0
D2
F2
(inverted).
gain
SGAIN
RTH1
LACT
LP3
D1
F1
Reset State
REVID
RTH0
PWD
High
LP2
Low
Low
Low
D0
LP
F0