STM32F417IGT6 STMicroelectronics, STM32F417IGT6 Datasheet - Page 36

Microcontrollers (MCU) ARM M4 1024 FLASH 168 Mhz 192kB SRAM

STM32F417IGT6

Manufacturer Part Number
STM32F417IGT6
Description
Microcontrollers (MCU) ARM M4 1024 FLASH 168 Mhz 192kB SRAM
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F417IGT6

Core
ARM Cortex M4
Processor Series
STM32F4
Data Bus Width
32 bit
Maximum Clock Frequency
168 MHz
Program Memory Size
1024 KB
Data Ram Size
192 KB
On-chip Adc
Yes
Number Of Programmable I/os
140
Number Of Timers
10
Operating Supply Voltage
1.7 V to 3.6 V
Package / Case
LQFP-176
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, I2C, I2S, SPI, UART
Program Memory Type
Flash
Lead Free Status / Rohs Status
 Details

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Cryptographic acceleration
The STM32F415xx and STM32F417xx devices embed a cryptographic accelerator. This
cryptographic accelerator provides a set of hardware acceleration for the advanced
cryptographic algorithms usually needed to provide confidentiality, authentication, data
integrity and non repudiation when exchanging messages with a peer.
The cryptographic accelerator supports DMA request generation.
Random number generator (RNG)
All STM32F415xx and STM32F417xx products embed an RNG that delivers 32-bit random
numbers generated by an integrated analog circuit.
General-purpose input/outputs (GPIOs)
Each of the GPIO pins can be configured by software as output (push-pull or open-drain,
with or without pull-up or pull-down), as input (floating, with or without pull-up or pull-down)
or as peripheral alternate function. Most of the GPIO pins are shared with digital or analog
alternate functions. All GPIOs are high-current-capable and have speed selection to better
manage internal noise, power consumption and electromagnetic emission.
The I/O configuration can be locked if needed by following a specific sequence in order to
avoid spurious writing to the I/Os registers.
Fast I/O handling allowing maximum I/O toggling up to 84 MHz.
Analog-to-digital converters (ADCs)
Three 12-bit analog-to-digital converters are embedded and each ADC shares up to 16
external channels, performing conversions in the single-shot or scan mode. In scan mode,
automatic conversion is performed on a selected group of analog inputs.
Additional logic functions embedded in the ADC interface allow:
These algorithms consists of:
Encryption/Decryption
Universal hash
It also provides a true random number generator that deliver 32-bit random numbers
produced by an integrated analog circuit.
Simultaneous sample and hold
Interleaved sample and hold
DES/TDES (data encryption standard/triple data encryption standard): ECB
(electronic codebook) and CBC (cipher block chaining) chaining algorithms, 64-,
128- or 192-bit key
AES (advanced encryption standard): ECB, CBC and CTR (counter mode)
chaining algorithms, 128, 192 or 256-bit key
SHA-1 (secure hash algorithm)
MD5
HMAC
Doc ID 022063 Rev 2
STM32F415xx, STM32F417xx

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