W91031SG Nuvoton Technology Corporation of America, W91031SG Datasheet - Page 8

• Manufacturer Part Number: W91031SG
• Description: IC CALL LINE IDENT 24-SOIC
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W91031SG

• Function: Caller ID Device
• Interface: FSK
• Number Of Circuits: 1
• Voltage - Supply: 3 V ~ 5 V
• Current - Supply: 2.5mA
• Operating Temperature: 0°C ~ 75°C
• Mounting Type: Surface Mount
• Package / Case: *
• Includes: FSK Demodulator, Line Reversal Detector, Ring Detector
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

Input Pre-processor
The input signal is processed by an Input Pre-processor, which is added to the offset voltage to adjust
the input amplitude and to filter out unwanted frequencies. The gain control op-amp is used to bias
the input voltage with the VREF signal voltage. The voltage of VREF pin is V
must connected a 0.1 F capacitor to V
feedback resistor between this pin and the INN pin. Figure 7-2 shows the necessary connections with
the tip/ring line inputs. In a single-ended configuration, the gain control op-amp is connected as
shown in Figure 7-3.
Dual Tone Alert Signal Detection
The dual tone alert signal is separated into high and low tones and detected by a high/low tone
detector. The dual tone alert signal detection circuit is enabled when the FSKE signal is low. It
requires an enable time to enable the dual tone alert signal detector when FSKE goes from high to
low. The ALGR is the output of the dual tone detector and when high indicates that the high tone and
low tone alert signals have been detected. The guard time improves detection performance by
rejecting detected signals with insufficient duration and by masking momentary detection dropout.
Figure 7-4 shows the relationship between the ALGR, ALGRC and ALGO pins and Figure 7-5 shows
the guard time waveform of the same pins. The total recognition time is t
the tone present detect time and t
the RC time constant with the capacitor discharging from V
from V
ALGO returns high. The total absent time is t
and t
capacitor charging from V
capacitor will charge rapidly via a charge switch after ALGO returns low. To obtain unequal present
and absent guard times, a diode can be connected as shown in Figure 7-6, to give the unequal
resistance required during capacitor charging and discharging.
Differential Input Amplifier
C1 = C2
R1 = R2
R3 = (R4 R5) / (R4 +R5)
Ring
Tip
GA
Figure 7-2 Differential Input Gain Control Circuit
SS
is the tone absent guard time. The tone absent guard time is the RC time constant with the
C2
C1
to V
R1
R2
DD
through a resistor). The capacitor will discharge rapidly via a discharge switch after
Voltage Gain
Av = R5 / R1
Input Impedance
Zin = 2
R3
DD
R4
R1
R5
0.1 uF
2
to V
+ (1 / wC)
GCFB
VREF
SS
INN
INP
GP
2
(the ALGRC pin charges from V
is the tone present guard time. The tone present guard time is
W91031
+
-
SS
. It is also used to select the input gain by connecting a
ABS
- 8 -
= t
DA
Input
Voltage Gain
A
+ t
V
= R2 / R1
Figure 7-3 Single-ended Input Gain Control Circuit
GA
C
, where t
SS
R1
to V
Preliminary W91031
DD
DA
DD
to V
is the tone absent detect time
REC
(the ALGRC pin discharges
SS
R2
= t
0.1 uF
through a resistor). The
DD
DP
VREF
GCFB
INP
INN
/2 typically, this pin
+ t
GP
W91031
+
-
, where t
DP
is