FT2232HQ - REEL FTDI, Future Technology Devices International Ltd, FT2232HQ - REEL Datasheet - Page 26

• Manufacturer Part Number: FT2232HQ - REEL
• Description: IC USB UART/FIFO DUAL HS 64-QFN
• Manufacturer: FTDI, Future Technology Devices International Ltd
• Series: USBmadeEZ-FIFOr

Specifications of FT2232HQ - REEL

• Features: USB to UART and/or FIFO, SPI, I2C, JTAG
• Number Of Channels: 2, DUART
• Fifo's: 4096 Byte
• Protocol: RS-232, RS-422, RS-485
• Voltage - Supply: 3 V ~ 3.6 V
• With Parallel Port: Yes
• With Auto Flow Control: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 64-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 768-1025-2; FT2232HQ - REEL

Table 4.1 FT245 Synchronous FIFO Interface Signal Timings
This single channel mode uses a synchronous interface to get high data transfer speeds. The chip drives a
60 MHz CLKOUT clock for the external system to use.
Note that Asynchronous FIFO mode must be selected on both channels before selecting the Synchronous
FIFO mode in software.
4.4.1 FT245 Synchronous FIFO Read Operation
A read operation is started when the chip drives RXF# low. The external system can then drive OE# low
to turn around the data bus drivers before acknowledging the data with the RD# signal going low. The
first data byte is on the bus after OE# is low. The external system can burst the data out of the chip by
keeping RD# low or it can insert wait states in the RD# signal. If there is more data to be read it will
change on the clock following RD# sampled low. Once all the data has been consumed, the chip will drive
RXF# high. Any data that appears on the data bus, after RXF# is high, is invalid and should be ignored.
4.4.2 FT245 Synchronous FIFO Write Operation
A write operation can be started when TXE# is low. WR# is brought low when the data is valid. A burst
operation can be done on every clock providing TXE# is still low. The external system must monitor TXE#
and its own WR# to check that data has been accepted. Both TXE# and WR# must be low for data to be
accepted.
Name
t10
t11
t12
t13
t14
t1
t2
t3
t4
t5
t6
t7
t8
t9
Minimum
7.5
7.5
11
11
11
1
1
1
1
0
1
0
0
Copyright © 2010 Future Technology Devices International Limited
Typical
16.67
8.33
8.33
FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC
Minimum Units
7.15
7.15
7.15
7.15
7.15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WR# setup time to CLKOUT (WR# low after TXE# low)
RD# setup time to CLKOUT (RD# low afterOE# low)
CLKOUT to read DATA valid
OE# to read DATA valid
Write DATA setup time
Write DATA hold time
CLKOUT high period
CLKOUT low period
CLKOUT TO TXE#
CLKOUT to RXF#
CLKOUT to OE#
CLKOUT period
WR# hold time
RD# hold time
Description
Document No.: FT_000061
Clearance No.: FTDI#77
Datasheet Version 2.10
26