DS1220Y Dallas Semiconductor, DS1220Y Datasheet

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DS1220Y

Manufacturer Part Number
DS1220Y
Description
16K Nonovolatile SRAM
Manufacturer
Dallas Semiconductor
Datasheet

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FEATURES
DESCRIPTION
The DS1220Y 16k Nonvolatile SRAM is a 16,384-bit, fully static, nonvolatile RAM organized as 2048
words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry which
constantly monitors V
energy source is automatically switched on and write protection is unconditionally enabled to prevent
data corruption. The NV SRAM can be used in place of existing 2k x 8 SRAMs directly conforming to
the popular bytewide 24-pin DIP standard. The DS1220Y also matches the pinout of the 2716 EPROM or
the 2816 EEPROM, allowing direct substitution while enhancing performance. There is no limit on the
number of write cycles that can be executed and no additional support circuitry is required for
microprocessor interfacing.
www.dalsemi.com
10 years minimum data retention in the
absence of external power
Data is automatically protected during power
loss
Directly replaces 2k x 8 volatile static RAM
or EEPROM
Unlimited write cycles
Low-power CMOS
JEDEC standard 24-pin DIP package
Read and write access times as fast as 100 ns
Full ±10% operating range
Optional industrial temperature range of
-40°C to +85°C, designated IND
CC
for an out-of-tolerance condition. When such a condition occurs, the lithium
1 of 8
PIN ASSIGNMENT
PIN DESCRIPTION
A0-A10
DQ0-DQ7
V
GND
CE
WE
OE
CC
24-Pin ENCAPSULATED PACKAGE
GND
DQ0
DQ1
DQ2
16k Nonvolatile SRAM
A7
A6
A5
A4
A3
A2
A1
A0
720-mil EXTENDED
1
2
3
4
5
6
7
8
9
10
11
12
- Address Inputs
- Data In/Data Out
- Chip Enable
- Write Enable
- Output Enable
- Power (+5V)
- Ground
24
23
22
21
20
19
18
17
16
15
14
13
VCC
WE
A8
A9
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
DS1220Y
111899

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DS1220Y Summary of contents

Page 1

... The NV SRAM can be used in place of existing SRAMs directly conforming to the popular bytewide 24-pin DIP standard. The DS1220Y also matches the pinout of the 2716 EPROM or the 2816 EEPROM, allowing direct substitution while enhancing performance. There is no limit on the number of write cycles that can be executed and no additional support circuitry is required for microprocessor interfacing ...

Page 2

... OE WRITE MODE The DS1220Y executes a write cycle whenever the WE and CE signals are active (low) after address inputs are stable. The later-occurring falling edge will determine the start of the write cycle. The write cycle is terminated by the earlier rising edge All address inputs must be kept valid throughout the write cycle ...

Page 3

... See Note 10 SYMBOL MIN TYP CCS1 I CCS2 I CCO1 I CCO1 V 4.25 TP SYMBOL MIN TYP I See Note 10) A MAX UNITS NOTES 5 ± 10%) CC MAX UNITS NOTES +1 3.0 7.0 mA 2.0 4 25°C) A MAX UNITS NOTES DS1220Y ...

Page 4

... DH2 (T A DS1220Y-120 DS1220Y-150 MAX MIN MAX MIN 120 150 100 120 50 60 100 120 120 150 90 100 See Note 10; V =5.0V ± 10%) CC DS1220Y-200 UNITS MAX MIN MAX 200 ns 150 200 ns 70 100 ns 150 200 200 ns 150 DS1220Y NOTE ...

Page 5

... READ CYCLE SEE NOTE 1 WRITE CYCLE 1 SEE NOTES AND 12 WRITE CYCLE 2 SEE NOTES AND DS1220Y ...

Page 6

... SYMBOL MIN 100 REC SYMBOL MIN during a write cycle, the output buffers remain in a high impedance IH is measured from the latter MAX UNITS NOTES MAX UNITS NOTES years 9 DS1220Y ...

Page 7

... low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers remain in a high impedance state during this period. 9. Each DS1220Y is marked with a 4-digit date code AABB. AA designates the year of manufacture. BB designates the week of manufacture. The expected t manufacture ...

Page 8

... DS1220Y NONVOLATILE SRAM, 24-PIN 720-MIL EXTENDED MODULE PKG 24-PIN DIM MIN A IN. 1.320 MM 33.53 B IN. 0.695 MM 17.65 C IN. 0.390 MM 9.91 D IN. 0.100 MM 2.54 E IN. 0.017 MM 0.43 F IN. 0.120 MM 3.05 G IN. 0.090 MM 2. 0.590 MM 14.99 J IN. 0.008 MM 0.20 K IN. 0.015 MM 0. DS1220Y MAX 1 ...

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