MC14050B ON Semiconductor, MC14050B Datasheet

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MC14050B

Manufacturer Part Number
MC14050B
Description
Manufacturer
ON Semiconductor
Datasheet

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MC14049B, MC14050B
Hex Buffer
Hex Buffer are constructed with MOS P–Channel and N–Channel
enhancement mode devices in a single monolithic structure. These
complementary MOS devices find primary use where low power
dissipation and/or high noise immunity is desired. These devices
provide logic level conversion using only one supply voltage, V
voltage for logic level conversions. Two TTL/DTL loads can be driven
when the devices are used as a CMOS–to–TTL/DTL converter (V
= 5.0 V, V
devices; consequently connections to these terminals will not affect
circuit operation.
2. Maximum Ratings are those values beyond which damage to the device
3. Temperature Derating: See Figure 3.
due to high static voltages or electric fields referenced to the V
precautions must be taken to avoid applications of any voltage higher than the
maximum rated voltages to this high–impedance circuit. For proper operation, the
ranges V
either V
MAXIMUM RATINGS
March, 2000 – Rev. 3
Symbol
The MC14049B Hex Inverter/Buffer and MC14050B Noninverting
The input–signal high level (V
Note that pins 13 and 16 are not connected internally on these
This device contains protection circuitry to protect the inputs against damage
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
High Source and Sink Currents
High–to–Low Level Converter
Supply Voltage Range = 3.0 V to 18 V
V
Meets JEDEC B Specifications
Improved ESD Protection On All Inputs
Semiconductor Components Industries, LLC, 2000
may occur.
V
V
T
I
V
P
T
T
I
out
IN
stg
DD
out
in
in
D
A
L
SS
can exceed V
SS
or V
OL
DC Supply Voltage Range
Input Voltage Range
Output Voltage Range
Input Current
Output Current
Power Dissipation,
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
V
DD
v
in
(DC or Transient)
(DC or Transient)
(DC or Transient) per Pin
(DC or Transient) per Pin
per Package (Note 3.)
(Plastic)
(SOIC)
(8–Second Soldering)
). Unused outputs must be left open.
0.4 V, I
18 V and V
DD
Parameter
(Voltages Referenced to V
OL
SS
3.2 mA).
V
out
IH
V
) can exceed the V
DD
are recommended.
– 0.5 to V
– 0.5 to +18.0
– 0.5 to +18.0
SS
– 55 to +125
– 65 to +150
) (Note 2.)
Value
825
740
260
10
45
DD
SS
+ 0.5
pin only. Extra
DD
1
supply
Unit
mW
mA
mA
DD
V
V
V
C
C
C
DD
.
1. For ordering information on the EIAJ version of
MC14049BCP
MC14049BD
MC14049BDR2
MC14049BF
MC14050BCP
MC14050BD
MC14050BDR2
MC14050BDTEL
MC14050BF
MC14050BFEL
the SOIC packages, please contact your local
ON Semiconductor representative.
Device
XX
A
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
http://onsemi.com
= Specific Device Code
= Assembly Location
CASE 751B
SOEIAJ–16
CASE 948F
CASE 648
TSSOP–16
DT SUFFIX
CASE 966
P SUFFIX
D SUFFIX
F SUFFIX
SOIC–16
PDIP–16
SOEIAJ–16
SOEIAJ–16
SOEIAJ–16
TSSOP–16 2000/Tape & Reel
SOIC–16
SOIC–16
SOIC–16
SOIC–16
Package
PDIP–16
PDIP–16
Publication Order Number:
2500/Tape & Reel
2500/Tape & Reel
16
16
16
1
1
1
MC140XXBCP
DIAGRAMS
See Note 1.
MARKING
See Note 1.
See Note 1.
AWLYYWW
MC140XXB
AWLYWW
16
AWLYWW
Shipping
2000/Box
2400/Box
2000/Box
2400/Box
MC14049B/D
1
140XXB
ALYW
0XXB
14

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MC14050B Summary of contents

Page 1

... MC14049B, MC14050B Hex Buffer The MC14049B Hex Inverter/Buffer and MC14050B Noninverting Hex Buffer are constructed with MOS P–Channel and N–Channel enhancement mode devices in a single monolithic structure. These complementary MOS devices find primary use where low power dissipation and/or high noise immunity is desired. These devices provide logic level conversion using only one supply voltage, V The input– ...

Page 2

... MC14049B, MC14050B PIN ASSIGNMENT OUT 2 15 OUT OUT OUT B OUT OUT LOGIC DIAGRAM MC14049B PIN 13 PIN PIN 1 DD http://onsemi.com MC14050B PIN 13 PIN PIN 1 DD ...

Page 3

... (50 pF – 50) Vfk Where (per Package pF MC14049B, MC14050B (Voltages Referenced Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î – Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 4

... Vdc GS MAXIMUM CURRENT LEVEL – 50 – 10 – 8.0 – 6.0 – 4 DRAIN–TO–SOURCE VOLTAGE (Vdc) DS Figure 1. Typical Output Source Characteristics MC14049B, MC14050B (7 pF Î Î Î Î Î Î Î Î Î Vdc Î Î Î Î Î Symbol Î ...

Page 5

... Figure 3. Ambient Temperature Power Derating PULSE GENERATOR Invert on MC14049B only Figure 4. Switching Time Test Circuit and Waveforms MC14049B, MC14050B (P) PDIP (D) SOIC 75 100 125 150 T , AMBIENT TEMPERATURE ( INPUT 90% 50% 10% t PHL OUTPUT MC14049B V out t PLH C ...

Page 6

... M –A– –B– –T– SEATING PLANE 0.25 (0.010 MC14049B, MC14050B PACKAGE DIMENSIONS PDIP–16 P SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R L SEATING –T– PLANE SOIC–16 D SUFFIX PLASTIC SOIC PACKAGE CASE 751B–05 ISSUE J ...

Page 7

... L PIN 1 IDENT. 1 0.15 (0.006 –V– C 0.10 (0.004) –T– SEATING D G PLANE MC14049B, MC14050B PACKAGE DIMENSIONS TSSOP–16 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948F–01 ISSUE É É É Ç Ç Ç J1 Ç Ç Ç É É É B SECTION N– ...

Page 8

... Email: ONlit–french@hibbertco.com English Phone: (+1) 303–308–7142 (M–F 12:00pm to 5:00pm UK Time) Email: ONlit@hibbertco.com EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781 *Available from Germany, France, Italy, England, Ireland MC14049B, MC14050B PACKAGE DIMENSIONS SOEIAJ–16 F SUFFIX PLASTIC EIAJ SOIC PACKAGE CASE 966–01 ...

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