MT88E45AS Zarlink Semiconductor, MT88E45AS Datasheet
MT88E45AS
Available stocks
Related parts for MT88E45AS
MT88E45AS Summary of contents
Page 1
... OSC1 OSC2 CB0 4-Wire Calling Number Identification Circuit 2 Advance Information DS5143 MT88E45AS MT88E45AN Description The MT88E45 is a low power CMOS integrated circuit suitable for receiving the physical layer signals used in North American (Bellcore) Calling Identity Delivery on Call Waiting (CIDCW) and Calling Identity Delivery (CID) services ...
Page 2
MT88E45 Pin Description Pin # Name 1 V Voltage Reference (Output). Nominally Vdd/ used to bias the Tip/Ring and Hybrid input op- REF amps. 2 IN1+ Tip/Ring Op-amp Non-inverting (Input). 3 IN1- Tip/Ring Op-amp Inverting (Input). 4 GS1 ...
Page 3
Advance Information Pin Description (continued) Pin # Name 10 DATA 3-wire FSK Interface Data (CMOS Output). Mark frequency corresponds to logical 1. Space frequency corresponds to logical 0. In mode 0 (when the CB0 pin is logic low) the FSK ...
Page 4
MT88E45 FSK CB0 CB1 CB2 Interface 0 Set by CB0 FSK Demodulation. Tip/Ring input (GS1) selected. DR/STD is DR. 0 Set by CB0 Hybrid CAS Detection. Hybrid Receive input (GS2) selected. DR/STD is STD. 0/1 0 ...
Page 5
Advance Information In North America, Caller ID uses the voiceband data transmission interface defined in the Bellcore document GR-30-CORE. The terminal or CPE (Customer Premises Equipment) requirements are defined in Bellcore document SR-TSV-002476. Typical services are CND (Calling Number Delivery), ...
Page 6
MT88E45 Being able to detect CAS on Tip/Ring also makes the MT88E45 suitable for BT on-hook CLIP applications. For applications such as those in most European countries where Tip/Ring CAS detection is not needed, then the Tip/Ring and Hybrid op-amp ...
Page 7
Advance Information 2130 Hz and 2750 Hz CAS/DT-AS Characteristics Frequency Tolerance Signal Level (per tone) Reject Level (per tone) Maximum Twist ( 2130Hz 2750Hz Duration Reject Duration Signal to Noise Ratio Hybrid Op-amp (GS2) Gain Vdd = 5V ...
Page 8
MT88E45 Both Tones Present CAS t DP EST t GP ST/GT STD Figure 5 - CAS Guard Time Circuit Operation dropouts once EST has met the minimum tone duration decrease the likelihood of a long talkoff being ...
Page 9
Advance Information Parameter Mark (Logical 1) Frequency Space (Logical 0) Frequency Received Signal Level Signal Reject Level On-hook No Ring Signalling Transmission Rate Twist ( MARK SPACE Signal to Noise Ratio Tip/Ring Op-Amp (GS1) Gain Vdd = 5V ...
Page 10
MT88E45 CAS detection, the CAS level will also be reduced for on-hook detection. FSK Data Interface The MT88E45 provides a powerful dual mode 3-wire interface so that the data bytes in the demodulated FSK bit stream can be extracted without ...
Page 11
Advance Information A 10ms hysteresis is provided to allow for momentary signal dropout once CD has been activated released when there is no activity at the FSK bandpass filter output for 10ms. When CD is inactive (high), the ...
Page 12
MT88E45 Application Circuits TIP RING Microcontroller = From Microcontroller (FSK Interface Mode 1 selected) R15 is required only if both FSK interface mode 0 and power down features are used. Unless ...
Page 13
Advance Information 1.00 0.95 0.90 0.85 0.80 0.75 0.70 0.668 0.65 0.60 0.55 0.531 0.50 3.0 Figure 8 - Gain Ratio as a Function of Nominal Vdd Gain Setting Resistor Calculation Example for Figure 8: • For the desired nominal ...
Page 14
MT88E45 Interrupt Source 1 INT1 (Open Drain) Interrupt Source 2 INT2 (CMOS) MT88E45 DR/STD (CMOS) Figure 9 - Application Circuit: Multiple Interrupt Source 14 Vdd Vdd Resistor (R2) Resistor (R1 can be opened and D1 shorted if the ...
Page 15
Advance Information Absolute Maximum Ratings* Parameter 1 Supply voltage with respect Voltage on any pin other than supplies 3 Current at any pin other than supplies 4 Storage Temperature * Exceeding these values may cause permanent damage. ...
Page 16
MT88E45 DC Electrical Characteristics Characteristics 8 DCLK Output Low Sink DATA Current DR/STD CD, EST ST/GT 9 IN1+ Input Current IN1- IN2+ IN2- DCLK CB0 CB1 CB2 Output High- Impedance Current 11 V Output Voltage REF 1 ...
Page 17
Advance Information AC Electrical Characteristics Characteristics 1 Accept Signal Level Range 2 Bell 202 Format Reject Signal Level 3 Transmission Rate 4 Mark and Space Frequencies Bell 202 1 (Mark) Bell 202 0 (Space) CCITT V.23 1 (Mark) CCITT V.23 ...
Page 18
MT88E45 AC Electrical Characteristics Characteristics 1 Tone present detect time 2 Tone absent detect time † AC Electrical Characteristics are over recommended operating conditions unless otherwise stated. AC Electrical Characteristics Characteristics 1 Power-up time OSC2 2 Power-down time 3 Input ...
Page 19
Advance Information AC Electrical Characteristics Characteristics 1 Frequency 2 Duty cycle DCLK 3 Rise time 4 DCLK low set DCLK DR/STD 5 DCLK low hold time after DR † AC Electrical Characteristics are over recommended operating conditions ...
Page 20
MT88E45 DATA DCLK Figure 10 - DATA and DCLK Mode 0 Output Timing DR DCLK CDD DCD Figure Output Timing t R1 Figure 12 ...
Page 21
Advance Information start TIP/RING (A/B) WIRES stop t IDD start DATA (Output) stop DCLK (Output (Output) Figure 13 ...
Page 22
MT88E45 1st Ring TIP/RING B A PWDN Note 2 Note OSC2 FSKen Note Note 5 DCLK DATA Figure 15 - Application Timing for Bellcore On-hook Data Transmission Associated with Ringing, Notes: This on-hook case ...
Page 23
Advance Information CPE goes off-hook TIP/RING CAS A Note 1 PWDN Note 8 Hybrid CASen Note 8 FSKen Note 2 Note OSC2 t DP EST t GP ST/GT t REC STD Note 9 Note ...
Page 24
MT88E45 Line Reversal ‘Idle State Tone Alert Signal’ DT-AS A/B Wires A B PWDN Note 6 Tip/Ring CASen t Note 6 DP EST t GP Note 1 ST/GT t REC STD Note 7 15 1ms TE DC load <120 Aµ ...
Page 25
Advance Information Line Reversal (Optionally sent) Ring Burst A/B Wires A B Note 1 250-400ms PWDN Note load TE AC load FSKen Note Note 4 DCLK DATA t PU OSC2 Figure 18 - Application ...
Page 26
... BSC) H 0.394 0.419 0.394 (10.00) (10.65) (10.00) L 0.016 0.050 0.016 (0.40) (1.27) (0.40) MT88E45AS 20 Pin Lead SOIC Package - S Suffix 26 Pin mils (lead coplanarity) Notes: 1) Not to scale 2) Dimensions in inches 3) (Dimensions in millimeters & B Maximum dimensions include allowable mold flash B 18-Pin 20-Pin Max ...
Page 27
Advance Information Notes: 1) Not to scale 2) Dimensions in inches 3) (Dimensions in millimeters) 4) Ref. JEDEC Standard M0-150/M0118 for 48 Pin 5) A & B Maximum dimensions include allowable mold flash Note: Governing controlling dimensions for 48 Pin ...
Page 28
...
Page 29
...
Page 30
... For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. trading as Zarlink Semiconductor or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use ...