MC10EP016 ON Semiconductor, MC10EP016 Datasheet

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MC10EP016

Manufacturer Part Number
MC10EP016
Description
3.3V / 5VECL 8-Bit Synchronous Binary Up Counter
Manufacturer
ON Semiconductor
Datasheet

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cascadeable 8–bit binary counter. Architecture and operation are the
same as the MC10E016 in the ECLinPS family.
(Terminal Count Load) pin. When TCLD is LOW (or left open, in
which case it is pulled LOW by the internal pulldowns), the TC
feedback is disabled, and counting proceeds continuously, with TC
going LOW to indicate an all–one state. When TCLD is HIGH, the TC
feedback causes the counter to automatically reload upon TC = LOW,
thus functioning as a programmable counter. The Qn outputs do not
need to be terminated for the count function to operate properly. To
minimize noise and power, unused Q outputs should be left
unterminated.
non–cascaded counter or divider application. COUT and COUT
should not be used in cascade configuration. Only TC should be used
for a counter or divider cascade chain output.
performance.
September, 2002 – Rev. 10
The MC10/100EP016 is a high–speed synchronous, presettable,
The counter features internal feedback to TC gated by the TCLD
COUT and COUT provide differential outputs from a single,
A differential clock input has also been added to improve
The 100 Series contains temperature compensation.
with V
with V
500 ps Typical Propagation Delay
PECL Mode Operating Range: V
NECL Mode Operating Range: V
Open Input Default State
Safety Clamp on Inputs
Internal TC Feedback (Gated)
Addition of COUT and COUT
8–Bit
Differential Clock Input
V
Fully Synchronous Counting and TC Generation
Asynchronous Master Reset
Semiconductor Components Industries, LLC, 2002
BB
Output
EE
EE
= 0 V
= –3.0 V to –5.5 V
CC
CC
= 3.0 V to 5.5 V
= 0 V
1
MC10EP016FA
MC10EP016FAR2
MC100EP016FA
MC100EP016FAR2
*For additional information, see Application Note
AND8002/D
CASE 873A
FA SUFFIX
LQFP–32
Device
ORDERING INFORMATION
xxx = 10 OR 100
A
WL = Wafer Lot
YY
WW = Work Week
http://onsemi.com
= Assembly Location
= Year
LQFP–32
LQFP–32 2000 Tape & Reel
LQFP–32
LQFP–32 2000 Tape & Reel
Package
Publication Order Number:
32
1
DIAGRAM*
MARKING
250 Units/Tray
250 Units/Tray
AWLYYWW
MC10EP016/D
MCxxx
Shipping
EP016

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MC10EP016 Summary of contents

Page 1

... WW = Work Week *For additional information, see Application Note AND8002/D ORDERING INFORMATION Device Package Shipping MC10EP016FA LQFP–32 250 Units/Tray MC10EP016FAR2 LQFP–32 2000 Tape & Reel MC100EP016FA LQFP–32 250 Units/Tray MC100EP016FAR2 LQFP–32 2000 Tape & Reel Publication Order Number: MC10EP016/D ...

Page 2

... Load Hold Load Terminal Count Reset MC10EP016, MC100EP016 PIN DESCRIPTION PIN P5 P0–P7* P6 Q0–Q7 CE MR* TC CLK*, CLK* TC COUT TCLD* COUT COUT, COUT Pins will default LOW when left open. Q7 TCLD TCLD MR CLK FUNCTION Load Parallel ( Continuous Count Count; Load Parallel LOW ...

Page 3

... Figure 2. 8-BIT Binary Counter Logic Diagram ATTRIBUTES Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. MC10EP016, MC100EP016 Q 0 Q0M CE MASTER SLAVE Q0M Q 0 ...

Page 4

... Input and output parameters vary 1:1 with V 7. Required 500 lfpm air flow when using +5 V power supply. For (V protection at elevated temperatures. Recommend V 8. All loading with –2.0 volts min varies 1:1 with IHCMR EE IHCMR input signal. MC10EP016, MC100EP016 Condition ...

Page 5

... Required 500 lfpm air flow when using +5 V power supply. For (V protection at elevated temperatures. Recommend V 19. All loading with –2.0 volts. CC 20. V min varies 1:1 with IHCMR EE IHCMR input signal. MC10EP016, MC100EP016 –5 –3.0 V (Note 10 –40 C Min Typ Max Min 120 ...

Page 6

... Waveforms) t Reset Recovery Time RR t Minimum Pulse Width CLK Output Rise/Fall Times r t 20% – 80% f 25. Measured using a 750 mV source, 50% duty cycle clock source. All loading with MC10EP016, MC100EP016 –5 –3.0 V (Note 21 –40 C Min Typ Max Min 120 160 200 120 – ...

Page 7

... Programmable Divider The EP016 has been designed with a control pin which makes it ideal for use as an 8-bit programmable divider. The MC10EP016, MC100EP016 Applications Information one bit thus sending their terminal count outputs back to a high state disabling the count operation of the more significant counters and placing them back into hold modes ...

Page 8

... Load 1001 0000 CLK PE TC Figure 5. Divide by 113 EP016 Programmable Divider Waveforms MC10EP016, MC100EP016 (continued Table 1. Preset Values for Various Divide Ratios Divide de Ratio ...

Page 9

... CE input of the most significant EP016. If the two TC outputs were OR tied the cascaded count operation would not operate properly. Because in the cascaded form the PE feedback is external and requires external gating, the maximum frequency of operation will be significantly less than the same operation in a single device. MC10EP016, MC100EP016 (continued ...

Page 10

... Odd Number Counters Design – AND8002 Marking and Date Codes – AND8009 ECLinPS Plus Spice I/O Model Kit – AND8020 Termination of ECL Logic Devices – For an updated list of Application Notes, please see our website at http://onsemi.com. MC10EP016, MC100EP016 Q D Receiver Device ...

Page 11

... MC10EP016, MC100EP016 –T– DETAIL Y 4X –Z– –AB– –AC– DETAIL AD PACKAGE DIMENSIONS LQFP FA SUFFIX 32–LEAD PLASTIC PACKAGE CASE 873A–02 ISSUE A –U– DETAIL AD BASE METAL N É É É É É É É É J SECTION AE–AE http://onsemi.com ...

Page 12

... Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800–282–9855 Toll Free USA/Canada MC10EP016, MC100EP016 JAPAN: ON Semiconductor, Japan Customer Focus Center 2–9–1 Kamimeguro, Meguro–ku, Tokyo, Japan 153–0051 Phone: 81–3–5773–3850 Email: r14525@onsemi ...

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