MC68HC705C8ACS

Manufacturer Part NumberMC68HC705C8ACS
ManufacturerFreescale Semiconductor, Inc
MC68HC705C8ACS datasheet
 


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Page 73/222:

Wait Mode

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Freescale Semiconductor, Inc.
6.3.4 Non-Programmable COP Watchdog in Stop Mode
The STOP instruction has these effects on the non-programmable COP
watchdog:
If the RESET pin brings the MCU out of stop mode, the COP watchdog
begins counting immediately. The reset function clears the COP counter
again after the 4064-t
If the IRQ pin brings the MCU out of stop mode, the COP watchdog
begins counting immediately. The IRQ function does not clear the
COP counter again after the 4064-t
Figure
NOTE:
If the clock monitor is enabled (CME = 1), the STOP instruction causes
it to time out and reset the MCU.
6.4 Wait Mode
The WAIT instruction places the MCU in an intermediate power
consumption mode. All central processor unit (CPU) activity is
suspended, but the oscillator, capture/compare timer, SCI, and SPI
remain active. Any interrupt or reset brings the MCU out of wait mode.
See
Figure
The WAIT instruction has these effects on the CPU:
The WAIT instruction does not affect any other registers or I/O lines. The
capture/compare timer, SCI, and SPI can be enabled to allow a periodic
exit from wait mode.
MC68HC705C8A — Rev. 3
MOTOROLA
For More Information On This Product,
Turns off the oscillator and the COP watchdog counter
Clears the COP watchdog counter
clock stabilization delay.
CYC
6-3.
6-1.
Clears the I bit in the condition code register, enabling interrupts
Stops the CPU clock, but allows the internal clock to drive the
capture/compare timer, SCI, and SPI
Low-Power Modes
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Low-Power Modes

Wait Mode

clock stabilization delay. See
CYC
Technical Data