K4S641632H-TC75 Samsung, K4S641632H-TC75 Datasheet
K4S641632H-TC75
Specifications of K4S641632H-TC75
Available stocks
Related parts for K4S641632H-TC75
K4S641632H-TC75 Summary of contents
Page 1
... SDRAM 64Mb H-die (x4, x8, x16) 64Mb H-die SDRAM Specification * Samsung Electronics reserves the right to change products or specification without notice. Revision 1.8 August 2004 CMOS SDRAM Rev. 1.8 August 2004 ...
Page 2
SDRAM 64Mb H-die (x4, x8, x16) Revision History Revision 0.0 (May, 2003) - Target spec release Revision 0.1 (July, 2003) - Preliminary spec release Revision 0.2 (August, 2003) - Modified IBIS characteristic. Revision 1.0 (September, 2003) - Finalized. Revision 1.1 ...
Page 3
... GENERAL DESCRIPTION The K4S640432H / K4S640832H / K4S641632H is 67,108,864 bits synchronous high data rate Dynamic RAM organized 4,194,304 words by 4 bits 2,097,152 words by 8 bits 1,048,576 words by 16 bits, fabricated with SAMSUNGcs high perfor- mance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle ...
Page 4
SDRAM 64Mb H-die (x4, x8, x16) Package Physical Dimension #54 #1 0.10 MAX 0.004 0. 0.028 #28 #27 22.62 MAX 0.891 22.22 r0.10 0.21 0.875 r0.004 0.008 +0.10 0.30 0.80 -0.05 0.004 0.0315 0.012 -0.002 54Pin TSOP(II) ...
Page 5
... SDRAM 64Mb H-die (x4, x8, x16) FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR CLK CKE CS Samsung Electronics reserves the right to change products or specification without notice. * Data Input Register Column Decoder Latency & Burst Length Programming Register LWE LCAS LWCBR ...
Page 6
SDRAM 64Mb H-die (x4, x8, x16) PIN CONFIGURATION (Top view) x8 x16 DQ0 DQ0 N DDQ DDQ DDQ DQ1 N.C N.C DQ2 DQ1 DQ0 SSQ SSQ DQ3 N.C N.C ...
Page 7
SDRAM 64Mb H-die (x4, x8, x16) ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage temperature Power dissipation Short circuit current Note : Permanent device damage may ...
Page 8
SDRAM 64Mb H-die (x4, x8, x16) DC CHARACTERISTICS (x4, x8) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active CC2 Precharge standby current in power-down mode I PS CKE & CLK ...
Page 9
... Operating current I CC4 (Burst mode) Refresh current I CC5 Self refresh current I CC6 Notes : 1. Measured with outputs open. 2. Refresh period is 64ms. 3. K4S641632H-TC 4. K4S641632H-TL 5. Unless otherwise noted, input swing IeveI is CMOS 70qC for x16 only) A Test Condition Burst length = 1 t tt (min CKE dV ...
Page 10
... Minimum delay is required to complete write. 3. All parts allow every cycle column address change case of row precharge interrupt, auto precharge and read burst stop 100MHz and below 100MHz operating conditions, tRDL=1CLK and tDAL=1CLK + 20ns is also supported. SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + tRP 3.3Vr 0.3V 70qC) ...
Page 11
SDRAM 64Mb H-die (x4, x8, x16) AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CAS latency=3 CLK cycle time CAS latency=2 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=3 Output data hold time CAS latency=2 CLK ...
Page 12
SDRAM 64Mb H-die (x4, x8, x16) IBIS SPECIFICATION I Characteristics (Pull-up) OH 133MHz Voltage Min (V) I (mA) 3.45 - 3.30 - 3.00 -0.35 2.70 -3.75 2.50 -6.65 1.95 -13.75 1.80 -17.75 1.65 -20.55 1.50 -23.55 1.40 -26.2 1.00 -36.25 ...
Page 13
SDRAM 64Mb H-die (x4, x8, x16) V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) DD 0.0 0.0 0.2 0.0 0.4 0.0 0.6 0.0 0.7 0.0 0.8 0.0 0.9 0.0 1.0 0.23 1.2 1.34 1.4 ...
Page 14
SDRAM 64Mb H-die (x4, x8, x16) SIMPLIFIED TRUTH TABLE Command Register Mode register set Auto refresh Entry Refresh Self refresh Exit Bank active & row addr. Read & Auto precharge disable column address Auto precharge enable Write & Auto precharge ...