LC72121 Sanyo Semiconductor Corporation, LC72121 Datasheet

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LC72121

Manufacturer Part Number
LC72121
Description
PLL frequency synthesizer for electronic tuning
Manufacturer
Sanyo Semiconductor Corporation
Datasheet

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Ordering number : EN5815B
Overview
The LC72121 and the LC72121M and the LC72121V are
high input sensitivity (20 mVrms at 130 MHz) PLL
frequency synthesizers for 3 V systems. These ICs are
serial data (CCB) compatible with the LC72131, and
feature the improved input sensitivity and lower spurious
radiation (provided by a redesigned ground system)
required in high-performance AM/FM tuners.
Functions
• High-speed programmable divider
• IF counter
• Reference frequency
• Phase comparator
• An MOS transistor for an active low-pass filter is built
— FMIN: 10 to 160 MHz ... Pulse swallower technique
— AMIN: 2 to 40 MHz ... Pulse swallower technique
— IFIN: 0.4 to 15 MHz ... For AM and FM IF counting
— One of 12 reference frequencies can be selected
— Supports dead zone control.
— Built-in unlocked state detection circuit
— Built-in deadlock clear circuit
in.
(using a 4.5 or 7.2 MHz crystal element)
1, 3, 5, 9, 10, 3.125, 6.25, 12.5, 15, 25, 50, and 100
kHz
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
0.5 to 10 MHz ... Direct division technique
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
(With built-in divide-by-2
prescaler)
PLL Frequency Synthesizers for Electronic Tuning
• I/O ports
• Operating ranges
• Package
• Comparison with the LC72131/M
— Output-only ports: 4 pins
— I/O ports: 2 pins
— Supports the output of a clock time base signal.
— Supply voltage: 2.7 to 3.6 V
— Operating temperature: – 40 to 85°C
— DIP22S, MFP24S, SSOP24
— Serial data compatible (CCB)
— Identical pin functions
— Two V
— The DIP version is pin compatible (V
— The MFP product provides a modified pin
— The SSOP24 is a newly developed package that has
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
LC72121, 72121M, 72121V
addresses are controlled by SANYO.
inserted as the DIP22S NC pins.)
assignment (The MFP20 package was replaced by
an MFP24 package, and extra V
the same pin assignment as the MFP24S product.
10803AS (OT) /D3098HA (OT) /70398RM (OT) No. 5815-1/23
SS
pins were added.
SS
pins were added.)
SS
CMOS IC
pins were

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LC72121 Summary of contents

Page 1

... Ordering number : EN5815B Overview The LC72121 and the LC72121M and the LC72121V are high input sensitivity (20 mVrms at 130 MHz) PLL frequency synthesizers for 3 V systems. These ICs are serial data (CCB) compatible with the LC72131, and feature the improved input sensitivity and lower spurious radiation (provided by a redesigned ground system) required in high-performance AM/FM tuners ...

Page 2

... Package Dimensions unit: mm 3059-DIP22S [LC72121 21.2 0.95 0.48 1.78 1.7 Pin Assignments LC72121, 72121M, 72121V unit: mm 3112-MFP24S 24 1 SANYO: DIP22S unit: mm 3175A-SSOP24 [LC72121M 0.15 12.6 0.35 1.0 0.8 SANYO: MFP24S [LC72121V 0.15 8.0 SANYO: SSOP24 0.22 0.65 0.43 Top view No. 5815-2/23 ...

Page 3

... Block Diagram LC72121, 72121M, 72121V No. 5815-3/23 ...

Page 4

... Note: Recommended value for CI for the crystal oscillator element: CI ≤ 120Ω (4.5MHz), CI ≤ 70Ω (7.2MHz) Electrical Characteristics in the Allowable Operating Ranges Parameter Internal feedback resistance Internal pull-down resistance Hysteresis Output high-level voltage LC72121, 72121M, 72121V = SSd SSa SSX ...

Page 5

... XIN 1 1 Xtal XOUT 22 24 Local FMIN 16 17 oscillator signal input Local AMIN 15 16 oscillator signal input LC72121, 72121M, 72121V Symbol Conditions BO1 to BO4, IO1, IO2 BO1 to BO4, IO1, IO2 DO ...

Page 6

... V) DD • The power on reset circuit operates when power is first applied. • Ground for the crystal oscillator circuit • Ground for the low-pass filter MOS transistor • Ground for the LC72121 digital systems other than those that use SSa SSX • ...

Page 7

... IN2 (92 OUT (A2 Normally high Normally low LC72121, 72121M, 72121V Address • Control data input (serial data input) mode • 24 bits of data are input • See the “DI Control Data (serial data input)” section for details on the content of the input data. • ...

Page 8

... Structure of the DI Control Data (serial data input) • IN1 mode • IN2 mode LC72121, 72121M, 72121V No. 5815-8/23 ...

Page 9

... Determines the IF counter measurement time. IF counter control data GT1 3 CTE 0 GT0, GT1 See the “Structure of the IF Counter” section for details. LC72121, 72121M, 72121V Function (* : don’t care) SNS LSB Set divisor (N) Actual divisor * P0 272 to 65535 Twice the set value 1 ...

Page 10

... When the PLL is unlocked, the DO pin goes low and UL in the serial data output is set to 0. • Controls the phase comparator dead zone DZ1 0 Phase comparator control data 8 0 DZ0, DZ1 1 1 Dead zone width: DZA < DZB < DZC < DZD LC72121, 72121M, 72121V Function DOC0 DO pin state 0 0 Open 0 1 Low when the PLL is unlocked 1 0 ...

Page 11

... UL IF counter binary • Indicates the value of the IF counter (20-bit binary counter). data 3 C19 MSB of the binary counter C0 LSB of the binary counter C19 to C0 LC72121, 72121M, 72121V Function Normal operation Forced to low Function Related data BO1 Related data IOC1 ...

Page 12

... CL: Normally high • CL: Normally low Serial Data Output (Out • CL: Normally high • CL: Normally low Note: The data conversion times (t and n-channel open-drain circuit. LC72121, 72121M, 72121V ≥ 0.75 µ < 0.75 µ ≥ 0.75 µ ...

Page 13

... DO Data output time t DO LC72121, 72121M, 72121V When CL is Stopped at the Low Level When CL is Stopped at the High Level Conditions These values differ depending on the value of the pull-up resistor used and the printed circuit board capacitance. Ratings Unit ...

Page 14

... For MW with a step size of 9 kHz (DVS = 0, SNS = 0: AMIN low-speed operation selected 1008 kHz (IF +450 kHz) WM VCO = 1458 kHz PLL fref =9 kHz ( 1458 (MW VCO) 9 kHz (fref) = 162 LC72121, 72121M, 72121V Set divisor Actual divisor 272 to 65535 Twice the set value ...

Page 15

... Structure of the IF Counter The LC72121 IF counter is a 20-bit binary counter, and takes the IF signal from the IFIN pin as its input. The result of the count can be read out serially, MSB first, from the DO pin. Measurement time GT1 GT0 Measurement time (GT ...

Page 16

... IF counting only are subject to incorrect stopping at points where there is no station due to IF buffer leakage. Note that the LC72121 input sensitivity can be controlled with the IFS bit in the serial data. Reduced sensitivity mode (IFS = 0) must be selected when this IC is used in conjunction with that does not provide an SD output and auto-search is implemented using only IF counting ...

Page 17

... Figure 1 Unlocked State Detection Timing For example, if fref is 1 kHz (a period of 1 ms) applications must wait at least 2 ms after the divisor N is changed before performing a locked/unlocked check. LC72121, 72121M, 72121V Figure 2 Circuit Structure No. 5815-17/23 ...

Page 18

... N. However, in this case also, even more reliable recognition of the locked state can be achieved by performing several checks of the state and requiring that the locked state be detected sequentially. LC72121, 72121M, 72121V Figure 3 Combining with Software Divisor N changed (data input) Wait at least 2 reference frequency periods ...

Page 19

... SSa current fluctuations in the time base pin to prevent degradation of the low-pass filter characteristics. Pin States after a Power on Reset LC72121, 72121M, 72121V ) and the ground for the SSd No. 5815-19/23 ...

Page 20

... Sample Application Circuit (Using the DIP22S package) LC72121, 72121M, 72121V Since this is a high-impedance circuit susceptible to noise. Therefore, lines in the printed circuit board pattern should be made as short as possible and it should be surrounded by the ground pattern. No. 5815-20/23 ...

Page 21

... IF counter buffer output and execute the IF count only if there signal. Auto- search techniques that only use the IF counter are subject to incorrect stopping at points where there is no station due to IF buffer leakage. LC72121, 72121M, 72121V Charge pump Dead zone ON/ON – ...

Page 22

... LC72131, which is a 5-V system. This means that since the loop gain is reduced, the loop filter constants, the lock time (SD wait time), and other related parameters must be reevaluated in the end product design. LC72121, 72121M, 72121V and V pins for noise exclusion. These capacitors must be ...

Page 23

... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of January, 2003. Specifications and information herein are subject to change without notice. LC72121, 72121M, 72121V PS No. 5815-23/23 ...

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