M5M51008BP-55LL Mitsumi Electronics, Corp., M5M51008BP-55LL Datasheet

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M5M51008BP-55LL

Manufacturer Part Number
M5M51008BP-55LL
Description
Manufacturer
Mitsumi Electronics, Corp.
Datasheet
DESCRIPTION
FEATURES
1
APPLICATION
Small capacity memory units
The M5M51008BP,FP,VP,RV,KV,KR are a 1048576-bit CMOS
static RAM organized as 131072 word by 8-bit which are
fabricated
technology. The use of resistive load NMOS cells and CMOS
periphery result in a high density and low power static RAM.
for the battery back-up application.
small outline package which is a high reliability and high density
surface mount device(SMD).Two types of devices are available.
VP,KV(normal lead bend type package),RV,KR(reverse lead bend
type package). Using both types of devices, it becomes very easy
to design a printed circuit board.
They are low standby current and low operation current and ideal
M5M51008BP,FP,VP,RV,KV,KR-55L
M5M51008BP,FP,VP,RV,KV,KR-70L
M5M51008BP,FP,VP,RV,KV,KR-10L
M5M51008BP,FP,VP,RV,KV,KR-55LL
M5M51008BP,FP,VP,RV,KV,KR-70LL
M5M51008BP,FP,VP,RV,KV,KR-10LL
Single +5V power supply
Low stand-by current 0.3µA (typ.)
Directly TTL compatible : All inputs and outputs
Easy memory expansion and power down by S
Data hold on +2V power supply
Three-state outputs : OR - tie capability
OE prevents data contention in the I/O bus
Common data I/O
Package
The M5M51008BVP,RV,KV,KR are packaged in a 32-pin thin
M5M51008BP
M5M51008BFP
M5M51008BVP,RV ············ 32pin 8 X 20 mm
M5M51008BKV,KR ············ 32pin 8 X 13.4 mm
Type name
using
high-performance
············ 32pin 600mil
············ 32pin 525mil
Access time
100ns
100ns
(max)
55ns
70ns
55ns
70ns
triple
M5M51008BP,FP,VP,RV,KV,KR -55L,-70L,-10L,
(1MHz)
polysilicon
Active
(max)
15mA
15mA
DIP
SOP
1
,S
2
Power supply current
2
2
TSOP
TSOP
(Vcc=3.0V,typ)
(Vcc=5.5V)
stand-by
100µA
(Vcc=5.5V)
(max)
0.3µA
20µA
CMOS
1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM
MITSUBISHI
ELECTRIC
PIN CONFIGURATION (TOP VIEW)
ADDRESS
OUTPUTS
A
A
A
A
A
A
A
NC
V
A
S
W
A
A
A
A
A
A
A
A
W
S
A
V
NC
A
A
A
A
A
A
A
INPUTS/
4
5
6
7
12
14
16
CC
15
2
13
8
9
11
INPUTS
11
9
8
13
2
15
CC
16
14
12
7
6
5
4
DATA
16
15
14
13
12
11
10
10
11
12
13
14
15
16
7
6
5
4
3
2
1
1
2
3
4
5
6
7
8
9
9
8
Outline 32P3H-F(RV), 32P3K-C(KR)
Outline 32P3H-E(VP), 32P3K-B(KV)
Outline 32P4(P), 32P2M-A(FP)
NC
A
DQ
DQ
DQ
GND
A
A
A
A
A
A
A
A
A
A
12
16
14
7
6
5
4
3
2
1
0
1
2
3
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
M5M51008BRV,KR
M5M51008BVP,KV
-55LL,-70LL,-10LL
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
MITSUBISHI LSIs
NC : NO CONNECTION
V
A
S
W
A
A
A
A
OE
A
S
DQ
DQ
DQ
DQ
DQ
CC
15
2
13
8
9
11
10
1
8
7
6
5
4
OUTPUT ENABLE
INPUT
ADDRESS
INPUT
CHIP SELECT
INPUT
WRITE CONTROL
INPUT
ADDRESS
INPUT
CHIP SELECT
INPUT
DATA
INPUTS/
OUTPUTS
ADDRESS
INPUTS
19
18
17
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
32
31
30
29
28
27
26
25
24
23
22
21
20
OE
A
S
DQ
DQ
DQ
DQ
DQ
GND
DQ
DQ
DQ
A
A
A
A
A
A
A
A
DQ
DQ
DQ
GND
DQ
DQ
DQ
DQ
DQ
S
A
OE
10
1
0
1
2
3
3
2
1
0
1
10
8
7
6
5
4
3
2
1
1
2
3
4
5
6
7
8

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M5M51008BP-55LL Summary of contents

Page 1

... DESCRIPTION The M5M51008BP,FP,VP,RV,KV,KR are a 1048576-bit CMOS static RAM organized as 131072 word by 8-bit which are fabricated using high-performance technology. The use of resistive load NMOS cells and CMOS periphery result in a high density and low power static RAM. They are low standby current and low operation current and ideal for the battery back-up application ...

Page 2

... A11 Pin numbers inside dotted line show those of TSOP 2 M5M51008BP,FP,VP,RV,KV,KR -55L,-70L,-10L, 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM When setting and OE non-selectable mode in which both reading and writing are 1 2 disabled. In this mode, the output stage high- impedance ...

Page 3

... Input capacitance C I Output capacitance C O Note 1: Direction for current flowing into positive (no mark). 2: Typical value is Vcc = 5V 25°C 3 M5M51008BP,FP,VP,RV,KV,KR -55L,-70L,-10L, 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM Conditions With respect to GND Ta=25°C (Ta=0~70°C, Vcc=5V±10%, unless otherwise noted) Test conditions I = 0.5mA – ...

Page 4

... Output disable time from W low dis(W) t Output disable time from OE high dis(OE) t Output enable time from W high en(W) t en(OE) Output enable time from OE low 4 M5M51008BP,FP,VP,RV,KV,KR -55L,-70L,-10L, 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM (Ta=0~70°C, Vcc=5V±10%, unless otherwise noted dis , dis Min ...

Page 5

... S 2 (Note 3) OE (Note "H" level Write cycle (W control mode (Note (Note 1~8 5 M5M51008BP,FP,VP,RV,KV,KR -55L,-70L,-10L, 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM a( (S1) (Note (S2 (OE (OE (S1 (S2 (S1) ...

Page 6

... Note 3: Hatching indicates the state is "don't care". 4: Writing is executed while S 5: When the falling edge simultaneously or prior to the falling edge rising edge Don't apply inverted phase signal externally when DQ pin is output mode. 6 M5M51008BP,FP,VP,RV,KV,KR -55L,-70L,-10L, 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM ...

Page 7

... Power down recovery time rec (PD) (3) POWER DOWN CHARACTERISTICS S control mode 2. control mode 0.2V 7 M5M51008BP,FP,VP,RV,KV,KR -55L,-70L,-10L, 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM (Ta = 0~70°C, unless otherwise noted) Test conditions 2.2V Vcc(PD) 2V Vcc(PD) 2.2V 4.5V Vcc(PD) Vcc(PD) < 4. 0.2V, other inputs = 0~ 0.2V,S ...

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