K4D263238A-GC45 Samsung, K4D263238A-GC45 Datasheet
K4D263238A-GC45
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K4D263238A-GC45 Summary of contents
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... K4D26323RA-GC 128Mbit DDR SDRAM Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Samsung Electronics reserves the right to change products or specification without notice. * VDD / VDDQ=2. 32Bit x 4 Banks (144-Ball FBGA) Revision 2.0 January 2003 - 1 - 128M DDR SDRAM Rev. 2.0 (Jan. 2003) ...
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... Revision 1.4 (November 14, 2001) • Added K4D26323RA-GC36(VDD/VDDQ=2.8V) Revision 1.3 (October 22, 2001) • Corrected part number of K4D263238A-GC2A to K4D26323RA-GC2A • Changed tCDLR of -GC2A and GC33 from 3tCK to 2tCK and applied since Sept 15, 2001. • Defined x32 DDR for mobile PC graphics separately - K4D26323AA-GL** featured with VDDQ=1.8V,ICC6=1mA with reduced operating current ...
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... Changed tCDLR of K4D263238A-GC33 from 2tCK to 3tCK • Removed VDDQ=1.8V from the spec. • Added K4D263238A- low power part • Defined DC spec. Revision 0.1 (August 2, 2001) - • Changed tCK(max) of K4D263238A-GC45/-50/-55/-60 from 7ns to 10ns. Revision 0.0 (June, 2001) - Target Spec • Defined Target Specification * VDD / VDDQ=2.8V * ...
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... FOR 1M x 32Bit x 4 Bank DDR SDRAM The K4D26323RA is 134,217,728 bits of hyper synchronous data rate Dynamic RAM organized as 4 x1,048,576 words by 32 bits, fabricated with SAMSUNG ’ extremely high performance up to 2.8GB/s/chip. I/O transactions are possible on both edges of the clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the device to be useful for a variety of high performance memory system applications ...
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K4D26323RA-GC PIN CONFIGURATION (Top View DQS0 DM0 VSSQ C DQ4 VDDQ NC D DQ6 DQ5 VSSQ E DQ7 VDDQ VDD F DQ17 DQ16 VDDQ G DQ19 DQ18 VDDQ DQS2 DM2 NC H DQ21 DQ20 VDDQ J ...
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K4D26323RA-GC INPUT/OUTPUT FUNCTIONAL DESCRIPTION Symbol Type CK, CK*1 Input CKE Input CS Input RAS Input CAS Input WE Input DQS ~ DQS Input/Output Input Input/Output ...
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K4D26323RA-GC BLOCK DIAGRAM (1Mbit x 32I Bank) Bank Select CK,CK ADDR LCKE LRAS LCBR CK,CK CKE * VDD / VDDQ=2. Intput Buffer CK, CK Data Input Register Serial to parallel 64 1Mx32 1Mx32 1Mx32 1Mx32 Column ...
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K4D26323RA-GC FUNCTIONAL DESCRIPTION • Power-Up Sequence DDR SDRAMs must be powered up and initialized in a predefined manner to prevent undefined operations. 1. Apply power and keep CKE at low state (All other inputs may be undefined) - Apply VDD ...
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K4D26323RA-GC MODE REGISTER SET(MRS) The mode register stores the data for controlling the various operating modes of DDR SDRAM. It programs CAS latency, addressing mode, burst length, test mode, DLL reset and various vendor specific options to make DDR SDRAM ...
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K4D26323RA-GC EXTENDED MODE REGISTER SET(EMRS) The extended mode register stores the data for enabling or disabling DLL and selecting output driver strength. The default value of the extended mode register is not defined, therefore the extened mode register must be ...
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K4D26323RA-GC ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Voltage on V supply relative to Vss DD Storage temperature Power dissipation Short circuit current Note : Permanent device damage ...
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K4D26323RA-GC DC CHARACTERISTICS Recommended operating conditions Unless Otherwise Noted, T Parameter Symbol Operating Current I CC1 (One Bank Active) Precharge Standby Current I P CC2 in Power-down mode Precharge Standby Current I N CC2 in Non Power-down mode Active Standby ...
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K4D26323RA-GC AC OPERATING TEST CONDITIONS Parameter Input reference voltage for CK(for single ended) CK and CK signal maximum peak swing CK signal minimum slew rate Input Levels Input timing measurement reference level Output timing measurement reference ...
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K4D26323RA-GC AC CHARACTERISTICS Sym- Parameter bol CL cycle time CK CL high level width low level width CL t DQS out access time from CK DQSCK t Output access time from CK AC ...
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K4D26323RA-GC Note The JEDEC DDR specification currently defines the output data valid window(tDV) as the time period when the data strobe and all data associated with that data strobe are coincidentally valid. - The previously used definition ...
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K4D26323RA-GC AC CHARACTERISTICS (I) Sym- Parameter bol t Row cycle time RC t Refresh row cycle time RFC t Row active time RAS t RAS to CAS delay for Read RCDRD t RAS to CAS delay for Write RCDWR t ...
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K4D26323RA-GC Simplified Timing( ...
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K4D26323RA-GC PACKAGE DIMENSIONS (144-Ball FBGA) 0.10 Max 0.45 ± 0.05 0.35 1.40 * VDD / VDDQ=2. INDEX MARK 12.0 <Top View> 0.8x11=8.8 0 ...