K4S643232H-TC60 Samsung, K4S643232H-TC60 Datasheet

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K4S643232H-TC60

Manufacturer Part Number
K4S643232H-TC60
Description
Manufacturer
Samsung
Datasheet

Specifications of K4S643232H-TC60

Case
TSOP

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SDRAM 64Mb H-die (x32)
CMOS SDRAM
64Mb H-die (x32) SDRAM Specification
Revision 1.4
August 2004
*Samsung Electronics reserves the right to change products or specification without notice.
Rev. 1.4 August 2004
- 1 -

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K4S643232H-TC60 Summary of contents

Page 1

... SDRAM 64Mb H-die (x32) 64Mb H-die (x32) SDRAM Specification *Samsung Electronics reserves the right to change products or specification without notice. Revision 1.4 August 2004 - 1 - CMOS SDRAM Rev. 1.4 August 2004 ...

Page 2

SDRAM 64Mb H-die (x32) Revision History Revision 0.0 (June, 2003) - Target spec First release. Revision 0.1 (July, 2003) - Delete speed 4.5ns. Revision 0.2 (September, 2003) - Preliminary spec release. Revision 1.0 (November, 2003) - Final spec release. Revision ...

Page 3

... Cycle) GENERAL DESCRIPTION The K4S643232H is 67,108,864 bits synchronous high data rate Dynamic RAM organized 524,288 words by 32 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. ...

Page 4

SDRAM 64Mb H-die (x32) Package Physical Dimension #86 #1 0.10 MAX 0.004 0. 0.024 #44 #43 22.62 MAX 0.891 22.22 ± 0.10 ± 0.004 0.875 0.008 +0.07 0.20 0.50 -0.03 +0.003 0.0197 0.0079 -0.001 86Pin TSOP(II) Package Dimension ...

Page 5

SDRAM 64Mb H-die (x32) FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR CLK CKE Data Input Register 512K x 32 512K x 32 512K x 32 512K x 32 Column Decoder Latency & Burst Length Programming Register LWE ...

Page 6

SDRAM 64Mb H-die (x32) PIN CONFIGURATION (Top view DQM0 A10/AP DQM2 DQ16 V DQ17 DQ18 V DQ19 DQ20 V DQ21 DQ22 V DQ23 DQ0 DDQ DQ1 4 83 ...

Page 7

SDRAM 64Mb H-die (x32) PIN FUNCTION DESCRIPTION Pin Name CLK System clock CS Chip select CKE Clock enable Address 0 10 BA0,1 Bank select address RAS Row address strobe CAS Column address strobe WE Write enable DQM0 ...

Page 8

SDRAM 64Mb H-die (x32) ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if "ABSOLUTE MAXIMUM ...

Page 9

... Operating Current I CC4 (Burst Mode) Refresh Current I CC5 Self Refresh Current I CC6 Notes : 1. Unless otherwise notes, Input level is CMOS(V 2. Measured with outputs open. 3. Refresh period is 64ms. 4. K4S643232H-TC 5. K4S643232H- 70°C A Test Condition Burst Length =1 ≥ t ≥ (min), t (min 0mA CKE ≤ ...

Page 10

SDRAM 64Mb H-die (x32) AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition Output 870Ω (Fig output load circuit OPERATING ...

Page 11

SDRAM 64Mb H-die (x32) AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CAS Latency=3 CLK cycle time CAS Latency=2 CAS Latency=3 CLK to valid output delay CAS Latency=2 Output data hold time CAS Latency=3 CLK high pulse width CAS ...

Page 12

SDRAM 64Mb H-die (x32) SIMPLIFIED TRUTH TABLE Command Register Mode register set Auto refresh Entry Refresh Self refresh Bank active & row addr. Read & Auto precharge disable column address Auto precharge enable Write & Auto precharge disable column address ...

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