M5M44265CJ-6 Mitsumi Electronics, Corp., M5M44265CJ-6 Datasheet
M5M44265CJ-6
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M5M44265CJ-6 Summary of contents
Page 1
... Early-write mode, OE and W to control output buffer impedance 512 refresh cycles every 8.2ms (A 512 refresh cycles every 128ms (A Byte or word control for Read/Write operation (2CAS, 1W type Applicable to self refresh version (M5M44265CJ,TP-5S,-6S,-7S : option) only APPLICATION Microcomputer memory, Refresh memory for CRT, Frame Buffer memory for CRT ...
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... EDO (HYPER PAGE MODE) 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM FUNCTION In addition to Hyper page mode, normal read, write and read- modify-write operations the M5M44265CJ, TP provides a number of Table 1 Input conditions for each mode Operation Lower byte read Upper byte read Word read Lower byte write ...
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... CC1 (AV) CC3 (AV) CC4 (AV) Note 4: I and I are dependent on output loading. Specified values are obtained with the output open. CC1 (AV) CC4 (AV) 3 Note 5: Column Address can be changed once or less while RAS=V M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S With respect to V Ta=25 C (Ta=0~70˚C, unless otherwise noted) Limits Nom Min 4.5 5 2.4 -0 ...
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... OEZ (max) WEZ(max) OFF(max) reference OH(min) OL(max) 13: Output is disabled after both RAS and CAS go to high. 4 M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S =5V±10%, V =0V, unless otherwise noted) SS Test conditions f=1MHz V =25mVrms I (Ta=0~70˚C, V =5V±10%, V =0V, unless otherwise noted, see notes 6,14,15) ...
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... Column address to CAS hold time CAL t RAS hold time after OE low ORH t CAS hold time after OE low OCH t t Note 22: Either or must be satisfied for a read cycle. RCH RRH 5 M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S Parameter M5M44265C-5,-5S M5M44265C-6,-6S M5M44265C-7,-7S (Note 16) (Note 17) (Note 18) (Note 19) (Note 19) (Note 20) (Note 20) (Note 20) (Note 21) t =2ns ...
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... Hyper page mode cycle only), the cycle is a read-modify-write cycle and the DQ will contain the data read from the selected address. If neither of the above condition (delayed write) of the DQ (at access time and until CAS or OE goes back M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S Parameter (Note 24) ...
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... Symbol t CBR self refresh RAS low pulse width RASS t CBR self refresh RAS high precharge time RPS t CBR self refresh CAS hold time CHS 7 M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S M5M44265C-5,-5S M5M44265C-6,-6S M5M44265C-7,-7S Parameter Min (Note 26) (Note 27) (Note 28) (Note 24) (Note 29) M5M44265C-5,-5S M5M44265C-6,-6S M5M44265C-7,-7S Parameter Min ...
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... ADDRESS ~ (INPUTS ~ (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t RAS t RCD t RAD t RAH t t ASC CAH ROW COLUMN ADDRESS t RCS t DZC t CAC CLZ Hi-Z t RAC t DZO Indicates the don't care input. Note 31 ...
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... ( (INPUTS ~ ( (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t RAS t CSH t RCD t RAD t RAH t t ASC CAH ROW COLUMN ADDRESS t RCS t DZC t CAC CLZ Hi-Z t RAC t DZO MITSUBISHI LSIs t RC ...
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... ADDRESS ~ (INPUTS ~ (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t RAS t CSH t RCD t t RAH CAH t ASC ROW COLUMN ADDRESS t t WCS t DS DATA VALID RPC t RSH t CAS WCH t DH Hi-Z MITSUBISHI LSIs ...
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... ( (INPUTS ~ ( (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t RAS t CSH t RCD t t RAH CAH t ASC COLUMN ROW ADDRESS t WCS t Hi DATA VALID Hi-Z MITSUBISHI LSIs RPC t RSH t CAS WCH ...
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... ~ (INPUTS ~ (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t RAS t CSH t RCD t RAH t ASC ROW COLUMN ADDRESS ADDRESS t RCS t DZC Hi-Z t CLZ Hi-Z t DZO MITSUBISHI LSIs RPC t RSH t CAS t CAH t CWL ...
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... V (OUTPUTS ~ ( (INPUTS ~ ( (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t RAS t CSH t RCD t RAH t ASC ROW COLUMN ADDRESS ADDRESS t RCS Hi-Z t DZC Hi-Z t CLZ Hi DZO MITSUBISHI LSIs RPC t RSH t CAS t CAH ...
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... ~ (INPUTS ~ (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t RAS t CSH t RCD t RAD t t RAH CAH t ASC COLUMN ROW ADDRESS ADDRESS t AWD t CWD t RCS t RWD t DZC Hi-Z t CAC CLZ Hi-Z VALID ...
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... V (OUTPUTS ~ ( (INPUTS ~ ( (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t RAS t CSH t RCD t RAD t t CAH RAH t ASC ROW COLUMN ADDRESS ADDRESS t AWD t CWD t RCS t RWD Hi-Z t DZC Hi-Z t CAC CLZ Hi-Z ...
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... ROW ADDRESS ~ (INPUTS ~ (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t CSH t t RCD t CAS CP t RAD CAH RAH t ASC COLUMN-1 t RCS t CAL t DZC t CAC CLZ Hi-Z DATA VALID-1 t RAC t ...
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... V (OUTPUTS ~ ( (INPUTS ~ ( (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,- CSH t t RCD CP t CAS t RAD t ASC t t RAH CAH t ASC COLUMN-1 t RCS t CAL t DZC Hi-Z t DZC t CAC CLZ Hi-Z t ...
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... ADDRESS ~ (INPUTS ~ (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,- CSH RCD CAS ASC t RAH ASC CAH COLUMN WCS WCH WCS DATA VALID-1 MITSUBISHI LSIs RAS ...
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... ( (INPUTS ~ ( (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t CSH RCD CAS ASC t RAH CAH t ASC COLUMN WCS WCS WCH DATA VALID-1 t RAS t t HPC RSH ...
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... ADDRESS ~ (INPUTS ~ (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t CSH t t CAS RCD t RAD t t RAH CAH t ASC ROW COLUMN-1 t AWD t t CWD RCS t RWD DZC Hi-Z t CAC CLZ ...
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... ( (INPUTS ~ ( (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t CSH t t CAS RCD t RAD t t RAH CAH t ASC ROW COLUMN-1 t AWD t t CWD RCS t RWD t t DZC DS Hi-Z t CAC CLZ ...
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... ADDRESS ~ (INPUTS ~ (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t CSH RCD CAS CP t RAD ASC RAH CAH t ASC COLUMN-1 COLUMN RCS WCS t CAL t DZC CAC ...
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... ~ (INPUTS ~ (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,- CAS t ASC t CAH COLUMN CAL RCH t HCWD t HAWD t HPWD Hi-Z t CAC CPA WEZ DATA VALID-1 t HCOD t OEZ t HAOD ...
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... ROW ADDRESS ~ (INPUTS ~ (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t RAS t CSH t t RCD CAS t RAD CAH RAH t ASC COLUMN-1 t RCS t DZC t CAC CLZ Hi-Z DATA VALID-1 t RAC t OEZ t ...
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... ROW ADDRESS ~ (INPUTS ~ (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t RAS t CSH RCD CAS t RAD CAH RAH t ASC COLUMN-1 t RCS t DZC t CAC CLZ Hi-Z DATA VALID-1 t RAC t t OEA ...
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... V IH RAS CRP V IH LCAS/UCAS ASR ~ (INPUTS ~ (OUTPUTS M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t RAS t RAH ROW ADDRESS MITSUBISHI LSIs RPC Hi CRP t ASR ROW ADDRESS ...
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... ~ (INPUTS REZ t OHR t OFF t OHC ~ (OUTPUTS OEZ M5M44265CJ,TP-5,-6,-7,-5S,-6S,- RAS t RPC t CSR t CHR RAS CSR t RPC CHR Hi-Z MITSUBISHI LSIs t CRP t ASR ROW COLUMN ADDRESS ADDRESS t RCS ...
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... (INPUTS ~ (OUTPUTS Note 32: Early write, delayed write, read write or read modify write cycle is applicable instead of read cycle. 28 M5M44265CJ,TP-5,-6,-7,-5S,-6S,- RAS t t RCD RSH t RAD RAH CAH ASC ROW COLUMN ADDRESS t RCS t ...
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... RRH t RCH RDD t CDD V DQ ~ (INPUTS REZ t OHR t OFF t OHC ~ (OUTPUTS OEZ t ODD M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S t RASS t CSR MITSUBISHI LSIs t RPS t RPC t CRP t CHS t ASR ROW ADDRESS Hi-Z t RCS ...
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... The time interval from the falling edge of RAS signal in the last CBR refresh cycle during read/write operation period to the falling edge of RAS signal at the start of self refresh operation should be set within t (shown in table 2). NSD 30 M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S Self Refresh Cycle t µ 100 s t RASS ...
Page 31
... Switching from self refresh operation to read/write operation. The time interval t from the rising edge of RAS signal at SNB the end of self refresh operation to the falling edge of RAS signal in the last CBR refresh cycle during read/write operation period should be set within 8.2 ms. 31 M5M44265CJ,TP-5,-6,-7,-5S,-6S,-7S Self Refresh t µ 100 s t RASS ...