AD1994ACPZ Analog Devices Inc, AD1994ACPZ Datasheet - Page 16

• Manufacturer Part Number: AD1994ACPZ
• Description: IC AMP AUDIO PWR 25W 64LFCSP
• Manufacturer: Analog Devices Inc
• Type: Class Dr

Specifications of AD1994ACPZ

• Output Type: 2-Channel (Stereo)
• Max Output Power X Channels @ Load: 25W x 2 @ 6 Ohm
• Voltage - Supply: 4.5 V ~ 5.5 V
• Features: Depop, Mute, Short-Circuit and Thermal Protection
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Operational Class: Class-D
• Audio Amplifier Output Configuration: 1-Channel Mono/2-Channel Stereo
• Output Power (typ): 50x1@3Ohm/25x2@6OhmW
• Audio Amplifier Function: Speaker
• Total Harmonic Distortion: 0.003@1W%
• Single Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (typ): 5/20V
• Supply Current (max): 260@12V/27@5V/7@5VmA
• Power Supply Requirement: Triple
• Rail/rail I/o Type: No
• Power Supply Rejection Ratio: 65dB
• Single Supply Voltage (min): Not RequiredV
• Single Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): 4.5/6.5V
• Dual Supply Voltage (max): 5.5/22.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LFCSP EP
• For Use With: EVAL-AD1994EBZ - BOARD EVAL FOR AD1994
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD1994
Power-Up Sequencing
Careful power-up is necessary when using the AD1994 to
ensure correct operation and to avoid possible latch-up issues.
The AD1994 should be powered up with RESET
held low until all the power supplies have stabilized. Once the
supplies have stabilized, bring the AD1994 out of RESET by
bringing RESET high.
Begin the soft unmute sequence by bringing
least 1 sec after the RESET rising edge. The amplifier produces
audio using a shorter start-up sequence (as shown in
but the amplifier can produce an audible pop or click noise as
the output starts switching. This is because the ac coupling
capacitors at the analog input have a long time constant. If
MUTE is deasserted substantially less than 1 sec after deasserting
RESET , then these capacitors may not have charged to a steady
state. They need ample time to settle at a bias voltage of V
the reference voltage for the single-ended inputs, or the
amplifier starts with a slight dc offset.
MONO MODE
The power supply voltage and the limited current that the
output transistors can source combine to dictate that maximum
total output power of the AD1994. For higher impedance loads,
the system is voltage limited, and for lower impedance loads,
the system is current limited. In normal stereo operation, each
output is driven by four MOSFET devices arranged in a full
H-bridge configuration, also known as bridge-tied load (BTL).
This provides the maximum differential output voltage swing,
equal to twice the voltage of the power supply. However,
operating in mono mode doubles the maximum achievable
output current.
When MONO_EN (Pin 64) is logic level high at the rising edge
of RESET , the right channel modulator is disabled, and the left
channel modulator is used to drive both the left and right
output stages in parallel. When using mono mode, connect
OUTL+ directly to OUTR+, connect OUTL− directly to
OUTR−, and use the combined differential pair to a drive a
single load. Connect the feedback pair to the positive and
negative feedback input of the left modulator. The right
channel feedback pins are unused in mono mode. The R
of the power FETs drops to half of its value in stereo operation
because the devices are in parallel, and the AD1994 delivers its
full current capability to a single channel.
Note that the practical effect of mono mode depends greatly on
the load impedance. If the load is 4 Ω or greater, the efficiency
of the amplifier increases due to the reduced effective resistance
of power FETs, and the amplifier dissipates less heat. However,
the amount of real power delivered to the load does not increase
because the system is voltage limited (that is, the output
waveform voltage clips before current limiting occurs).
MUTE
and
high at
MUTE
Table 7),
DS-ON
REF
,
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When the load impedance is substantially less than 4 Ω, the
system would be current limited if configured for normal stereo
operation, and the amplifier would enter the overcurrent error
state when a nominal input signal is applied. Under these
conditions, the amount of real power delivered to the load
increases in mono mode. The minimum recommended
impedance in mono mode is 2 Ω (as compared to 4 Ω for stereo
operation), so the effective power delivered to a single channel
can be as much as twice the maximum achievable in stereo mode.
For reactive loads, the impedance can only be below the
recommended threshold over a small portion of the amplifier’s
bandwidth. In these cases, the amplifier can enter overcurrent
shutdown in response to even small input signals in those
frequency bands. When designing a system, use the minimum
load impedance over the entire range of amplified frequencies
when calculating current output rather than the average or
nominal load impedance ratings often cited by loudspeaker
driver manufacturers.
MODULATOR MODE
The AD1994 is capable of operating as a modulator for controlling
external power devices. When MOD_EN (Pin 49) is logic level
high at the rising edge of
power stages are disabled. The error output flags (
and ERR0 ) and the nonoverlap delay inputs (DCNTL2, DCNTL1,
and DCNTL0) no longer have meaning because they apply only
to the internal power stages. The logic level outputs from the
two modulators appear on Pin 19 (MODL) and Pin 20 (MODR).
GAIN STRUCTURE
Analog Input Levels
The AD1994 has single-ended inputs for the left and right
channels. The analog input section uses an internal amplifier to
bias the input signal to the reference level, V
equal to AV /2. A dc-blocking capacitor, as shown in Figure 44
prevents this bias voltage from affecting the signal source. In
combination with the nominal 20 kΩ input impedance, the value
of this capacitor should be large enough to produce a flat
frequency response at the lowest input frequency of interest.
Note that the amplifier is capable of dc-coupled operation if the
circuit includes some means to account for this bias voltage.
0V
DD
Figure 44. AC-Coupled Input Signal
RESET , both the left and right internal
+
AINL/
AINR
REF
, which is nominally
ERR2 ERR1
,
,
,