CXD1175AM Sony, CXD1175AM Datasheet
CXD1175AM
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CXD1175AM Summary of contents
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... Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. CXD1175AM/AP CXD1175AM 24 pin SOP (Plastic) Absolute Maximum Ratings (Ta = 25°C) • ...
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... Clock generator CLK Lower Lower encoder comparators with (4 bit) S/H (4 bit) Lower Lower encoder comparators with (4 bit) S/H (4 bit) Upper Upper encoder comparators with (4 bit) S/H (4 bit) – 2 – CXD1175AM/ Reference voltage VRB 23 VRBS VRT ...
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... – 3 – CXD1175AM/AP Description When OE = Low, Data is output. When OE = High pins turn to High impedance. Digital ground D0 (LSB (MSB) output Digital +5V Clock input Shorted with VRT generates, +2.6V. Reference voltage (Top) Reference voltage (Bottom) Analog +5V ...
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... – – 18ns : Point for analog signal sampling. Timing Chart 4.5ns 90% 10% t PZL 1.3V 10% t PZH 90% 1.3V Timing Chart 2 – 4 – CXD1175AM/ ...
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... V = 4.75 to 5.25V –40 to +85°C 0 0 1kHz ramp IN Envelope Potential difference to VRT –10 Potential difference to VRB End point NTSC 40 IRE mod ramp Fc = 14.3MSPS – 5 – CXD1175AM/AP = 2.5V 25°C) RT Typ. Max. Unit MSPS 20 MHz 18 –35 – +15 +45 +0.5 +1.3 LSB ±0.3 ± ...
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... max 4.75 to 5.25V Conditions With TTL 1 gate and 10pF load 20pF 20pF – 6 – CXD1175AM/AP = 0.5V 2.5V 25° Min. Typ. Max. Unit 4.5 6.6 8 230 300 450 0.60 0.64 0.68 1.96 2.09 2.21 2.25 2.39 2.53 3.5 1 ...
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... CX20202A-1 TTL 8 8 CXD IN 1175A ECL 620 –5.2V CLK TTL ECL 2. 0. – – 7 – CXD1175AM/AP Measurement DV DD point output pin includes the capacitance of the probe L and others. ERROR RATE H.P.F COUNTER 1 10bit D/A 2 VECTOR SCOPE D ...
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... Digital output Operation (See Block Diagram and Timing Chart) 1. The CXD1175AM/ 2-step parallel system A/D converter featuring a 4-bit upper comparators group and 2 lower comparators groups of 4-bit each. The reference voltage that is equal to the voltage between VRT – VRB/16 is constantly applied to the upper 4-bit comparator block. Voltage that corresponded to the upper data is fed through the reference supply to the lower data ...
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... By connecting OE to GND output mode is obtained. By connecting About latch necessary that AV and DV DD This is to avoid latch up due to the voltage difference between AV = 2.6V and V RT pins be the common source of power supply – 9 – CXD1175AM/AP and RT = 0.6V, is activated. RB high impedance is obtained. DD and DV pins when power is ON ...
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... Q3 R7 500 R10 C13 10p C7 C11 47µ 0.1µ –12V +5V pins the common source of power supply. DD – 10 – CXD1175AM/AP HC04 CLK CLOCK (MSB CXD1175AM/ (LSB ...
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... Gain (V = 2Vp-p input) 0.5 IN Offset voltage Clock input TTL compatible Pulse width T 25ns (min.) CW1 T 25ns (min.) CW0 V OUT 8 8 CLOCK BUFFER GND +5V –5V Max. Unit 150 mA 20 Typ. Max. Unit – 11 – CXD1175AM/AP Unnecessary during self-bias usage OSC SW CLOCK ...
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... Hold time h t Data delay DA PD (DA) (R > 10k ) L Max. Unit 1.1 V Digital output code LSB Tpw 0 Tpw 1 Tdc t PD (AD Min. Typ. Max – 12 – CXD1175AM/AP Unit ...
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... CXD1175AM/ ...
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... VRB is adjusted at VR3, and VRT at VR4. Reference voltage is given with self-bias for PCB shipment. 4. Analog output gain (VR5) Full-scale voltage of the D/A converter output is adjusted. transistor Q1 2SC2785 Q2 2SC2785 Q3 2SC2785 Q4 2SC2785 Q5 2SC2785 IC IC1 74S174 IC2 74S174 IC3 74S04 oscillator OSC others connector BNC071 SW AT1D2M3 – 14 – CXD1175AM/AP ...
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... V and AV ) and capacitor C14 (between have a common voltage and a supply source. The DV SS (Pins 11 and 13) are provided in the CXD1175A, and a common DD – 15 – CXD1175AM/AP and DV ) are important D/A converter. DD ...
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... Analog input buffer & driver block is designed to handle conventional video band signals. Accordingly, for tests involving frequencies higher than that, methods shown in the figure below are recommended. S.G. High frequency input measurement circuit = 2.6V and V = 0.6V is available by shorting – 16 – CXD1175AM/AP and RTS RB D1175A and – RT ...
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... C14 CXD1175A C14 CXD1175A C14 CXD1175A – 17 – CXD1175AM/AP DIGITAL IC DIGITAL IC DIGITAL IC ...
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... CXD1175A CXD1175A CXD1175A – 18 – CXD1175AM/AP DIGITAL IC DIGITAL IC DIGITAL IC ...
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... Silk Side Component side Soldering side 1 – 19 – CXD1175AM/AP ...
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... Two kinds of package surface: 1.All mat surface type. 0.5 ± 0.1 2.All mirror surface type. 1.2 ± 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER PLATING DIP-24P-01 DIP024-P-0400 LEAD MATERIAL 42/COPPER ALLOY 2.0g PACKAGE MASS – 20 – CXD1175AM/AP + 0.4 1.85 – 0.15 0.15 + 0.2 0.1 – 0.05 0° to 15° ...